search for: __kernel_tss_limit

...y_handler(unsigned long physaddr) } } +void __head early_load_tss(void) +{ + struct desc_struct *gdt = (struct desc_struct *)boot_gdt; + struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw); + tss_desc tss_desc; + + set_tssldt_descriptor(&tss_desc, (unsigned long)tss, DESC_TSS, + __KERNEL_TSS_LIMIT); + native_write_gdt_entry(gdt, GDT_ENTRY_TSS, &tss_desc, DESC_TSS); + + asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8)); +} + void __head early_idt_setup(unsigned long physbase) { gate_desc *idt = fixup_pointer(idt_table, physbase); diff --git a/arch/x86/kernel/head_64.S...

From: Joerg Roedel <jroedel at suse.de> Hi, here is the fourth version of the SEV-ES Guest Support patches. I addressed the review comments sent to me for the previous version and rebased the code v5.8-rc5. The biggest change in this version is the IST handling code for the #VC handler. I adapted the entry code for the #VC handler to the big pile of entry code changes merged into

From: Joerg Roedel <jroedel at suse.de> Hi, here is the fourth version of the SEV-ES Guest Support patches. I addressed the review comments sent to me for the previous version and rebased the code v5.8-rc5. The biggest change in this version is the IST handling code for the #VC handler. I adapted the entry code for the #VC handler to the big pile of entry code changes merged into

Hi, here is the next version of changes to enable Linux to run as an SEV-ES guest. The code was rebased to v5.7-rc3 and got a fair number of changes since the last version. What is SEV-ES ============== SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted State' and means a hardware feature of AMD processors which hides the register state of VCPUs to the hypervisor by

Hi, here is the next version of changes to enable Linux to run as an SEV-ES guest. The code was rebased to v5.7-rc3 and got a fair number of changes since the last version. What is SEV-ES ============== SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted State' and means a hardware feature of AMD processors which hides the register state of VCPUs to the hypervisor by