search for: __ioapic_read_entry

Displaying 4 results from an estimated 4 matches for "__ioapic_read_entry".

2011 Nov 11
4
[PATCH] x86: clean up __io_apic_eoi()
...igned int a /* If pin is unknown, search for it */ if ( pin == -1 ) { - unsigned int p; - for ( p = 0; p < nr_ioapic_entries[apic]; ++p ) + for ( pin = 0; pin < nr_ioapic_entries[apic]; ++pin ) { - entry = __ioapic_read_entry(apic, p, TRUE); + entry = __ioapic_read_entry(apic, pin, TRUE); if ( entry.vector == vector ) - { - pin = p; - /* break; */ - - /* Here should be a break out of the loop, but at the -...
2011 May 09
1
Bug#625438: [PATCH] xen: ioapic: avoid gcc 4.6 warnings about uninitialised variables
...c --- a/xen/arch/x86/io_apic.c Thu May 05 17:40:34 2011 +0100 +++ b/xen/arch/x86/io_apic.c Mon May 09 11:43:35 2011 +0100 @@ -156,6 +156,52 @@ nomem: return 0; } +union entry_union { + struct { u32 w1, w2; }; + struct IO_APIC_route_entry entry; +}; + +static struct IO_APIC_route_entry __ioapic_read_entry(int apic, int pin, int raw) +{ + unsigned int (*read)(unsigned int, unsigned int) + = raw ? __io_apic_read : io_apic_read; + union entry_union eu; + eu.w1 = (*read)(apic, 0x10 + 2 * pin); + eu.w2 = (*read)(apic, 0x11 + 2 * pin); + return eu.entry; +} + +static struct IO_APIC_r...
2011 May 09
1
Bug#625438: [PATCH] xen: ioapic: avoid gcc 4.6 warnings about uninitialised variables
...c --- a/xen/arch/x86/io_apic.c Thu May 05 17:40:34 2011 +0100 +++ b/xen/arch/x86/io_apic.c Mon May 09 11:43:35 2011 +0100 @@ -156,6 +156,52 @@ nomem: return 0; } +union entry_union { + struct { u32 w1, w2; }; + struct IO_APIC_route_entry entry; +}; + +static struct IO_APIC_route_entry __ioapic_read_entry(int apic, int pin, int raw) +{ + unsigned int (*read)(unsigned int, unsigned int) + = raw ? __io_apic_read : io_apic_read; + union entry_union eu; + eu.w1 = (*read)(apic, 0x10 + 2 * pin); + eu.w2 = (*read)(apic, 0x11 + 2 * pin); + return eu.entry; +} + +static struct IO_APIC_r...
2013 Mar 19
7
[PATCH 0/3] IOMMU errata treatment adjustments
1: IOMMU: properly check whether interrupt remapping is enabled 2: AMD IOMMU: only disable when certain IVRS consistency checks fail 3: VT-d: deal with 5500/5520/X58 errata Patch 1 and 2 are version 2 of a previously submitted, then withdrawn patch following up after XSA-36. Patch 3 is version 3 of a patch previously sent by Malcolm and Andrew. Signed-off-by: Jan Beulich