Displaying 8 results from an estimated 8 matches for "__fsub64".
2006 Oct 10
4
[LLVMdev] FP emulation
...Uses d0, d1 and defines d0,d1
> >
> > This seems to work, at least on simple test files.
>
> That should be a robust solution.
>
> > But I would also need a way to convert such a FSUB64
> pseudo-instruction
> > into the assembler function call, e.g. "call __fsub64". At the
> moment I
> > don't quite understand at which stage and how I should do it
> (lowering,
> > selection, combining??? ). What would be the easiest way to map it
> to
> > such a call instruction?
>
> Why not just make the asm string be "call __...
2006 Oct 09
0
[LLVMdev] FP emulation
...Imp<[d0,d1],[d0,d1]>; // Uses d0, d1 and defines d0,d1
>
> This seems to work, at least on simple test files.
That should be a robust solution.
> But I would also need a way to convert such a FSUB64 pseudo-instruction
> into the assembler function call, e.g. "call __fsub64". At the moment I
> don't quite understand at which stage and how I should do it (lowering,
> selection, combining??? ). What would be the easiest way to map it to
> such a call instruction?
Why not just make the asm string be "call __fsub64"?
> One issue with the d...
2006 Oct 09
2
[LLVMdev] FP emulation
...", [(set d0, (fsub d0, d1))]>,
Imp<[d0,d1],[d0,d1]>; // Uses d0, d1 and defines d0,d1
This seems to work, at least on simple test files.
But I would also need a way to convert such a FSUB64 pseudo-instruction
into the assembler function call, e.g. "call __fsub64". At the moment I
don't quite understand at which stage and how I should do it (lowering,
selection, combining??? ). What would be the easiest way to map it to
such a call instruction?
One issue with the described approach is a pretty inefficient code
resulting after the register allocati...
2006 Oct 10
0
[LLVMdev] FP emulation
On Tue, 10 Oct 2006, Roman Levenstein wrote:
>>> such a call instruction?
>>
>> Why not just make the asm string be "call __fsub64"?
>
> Well, of course it would be the best solution. But the interesting part
> is that I need to generate the machine code directly because for
> different reasons use of a system assembler is not an option. As a
ok.
> result, I need to do this conversion in the target backen...
2006 Oct 10
0
[LLVMdev] FP emulation
...hine
> instructions at all. Instead, I basically tell that I will expand all
> FP operations myself and then I simply expand them into the following
> sequence of instructions:
> mov arg1, %d0 // enfore register constraint
> mov arg2, %d1 // enfore register constraint
> call __fsub64
>
> Is it correct understanding? If yes, how do I explain that arguments
> are to be passed on the concrete physical registers like %d0 and %d1
> and result comes on %d0? Do I need to allocate virtual regs for them
> and pre-assign physical regs somehow?
>
> Or my be I have to...
2006 Oct 11
5
[LLVMdev] FP emulation
> On Tue, 10 Oct 2006, Roman Levenstein wrote:
> >>> such a call instruction?
> >>
> >> Why not just make the asm string be "call __fsub64"?
> >
> > Well, of course it would be the best solution. But the interesting
> part
> > is that I need to generate the machine code directly because for
> > different reasons use of a system assembler is not an option. As a
>
> ok.
>
> > result, I ne...
2006 Oct 09
0
[LLVMdev] tblgen multiclasses
Hi Chris,
Thanks for this info. This provides even better and more advanced
examples of multiclass usage!
But your previous explanations were so good that I implemented in my
backend last week almost the same that you've done now in the
X86InstrSSE.td. I even introduced isCommutable parameter to indicate
this property, just as you did. So, by now integer arithmetic and
general purpose
2006 Oct 08
3
[LLVMdev] tblgen multiclasses
For anyone interested, X86InstrSSE.td makes extensive use of multiclasses
now if people are looking for examples other than the sparc backend.
-Chris
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