search for: __ffs

...p.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c @@ -99,6 +99,18 @@ nvkm_outp_release(struct nvkm_outp *outp, u8 user) } } +static inline bool +nvkm_outp_ior_route_quirk(struct nvkm_outp *outp) +{ + struct nvkm_device *dev = outp->disp->engine.subdev.device; + + int macro_link = __ffs(outp->info.or) * 2 + outp->info.sorconf.link; + if (unlikely(dev->quirk)) + return !(dev->quirk->outp_links_skip & BIT(macro_link)); + + return true; +} + static inline int nvkm_outp_acquire_ior(struct nvkm_outp *outp, u8 user, struct nvkm_ior *ior) { @@ -115,6 +127,7 @@ nvkm...

...tp *outp, u8 user) /* Failing that, a completely unused OR is the next best thing. */ list_for_each_entry(ior, &outp->disp->ior, head) { if (!ior->asy.outp && ior->type == type && !ior->arm.outp && - (ior->func->route.set || ior->id == __ffs(outp->info.or))) + ((ior->func->route.set && route_crossbar) || + ior->id == __ffs(outp->info.or))) return nvkm_outp_acquire_ior(outp, user, ior); } @@ -147,7 +160,8 @@ nvkm_outp_acquire(struct nvkm_outp *outp, u8 user) */ list_for_each_entry(ior, &amp...

Taken from NVIDIA binary driver (Linux 64-bit, revision 390.25) from README.txt. Signed-off-by: Danilo Krummrich <danilokrummrich at dk-develop.de> --- drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c | 41 ++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c index

...m/nouveau/core/core/event.c +++ b/drivers/gpu/drm/nouveau/core/core/event.c @@ -26,7 +26,7 @@ void nvkm_event_put(struct nvkm_event *event, u32 types, int index) { - BUG_ON(!spin_is_locked(&event->refs_lock)); + assert_spin_locked(&event->refs_lock); while (types) { int type = __ffs(types); types &= ~(1 << type); if (--event->refs[index * event->types_nr + type] == 0) { @@ -39,7 +39,7 @@ nvkm_event_put(struct nvkm_event *event, u32 types, int index) void nvkm_event_get(struct nvkm_event *event, u32 types, int index) { - BUG_ON(!spin_is_locked(&event-&...

Hi Ben, still _assuming_ it's an issue of the card I thought about why it works with the NVIDIA binary driver. And I can image they're just trying to do an identity-mapping first and if that doesn't work (e.g. the particular SOR is already in use by another macro link) they just pick the next suitable one. So the case would be that the NVIDIA binary driver always assignes the only

The ffsll function is a lot slower than the __ffs64 built-in which compiles to a single instruction on 64-bit. It's also nice to avoid custom versions of standard functions. Note that __ffs == ffs - 1. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- I wrote a user-space program to test these out and make sure that the function...

...nown viommu prop 0x%x\n", type); > } > @@ -615,7 +636,7 @@ static int viommu_domain_finalise(struct viommu_endpoint *vdev, > struct viommu_dev *viommu = vdev->viommu; > struct viommu_domain *vdomain = to_viommu_domain(domain); > > - viommu_page_size = 1UL << __ffs(viommu->pgsize_bitmap); > + viommu_page_size = 1UL << __ffs(vdev->pgsize_bitmap); > if (viommu_page_size > PAGE_SIZE) { > dev_err(vdev->dev, > "granule 0x%lx larger than system page size 0x%lx\n", Looks like this is messed up on 32 bit: e.g. 0x1000...

...nown viommu prop 0x%x\n", type); > } > @@ -615,7 +636,7 @@ static int viommu_domain_finalise(struct viommu_endpoint *vdev, > struct viommu_dev *viommu = vdev->viommu; > struct viommu_domain *vdomain = to_viommu_domain(domain); > > - viommu_page_size = 1UL << __ffs(viommu->pgsize_bitmap); > + viommu_page_size = 1UL << __ffs(vdev->pgsize_bitmap); > if (viommu_page_size > PAGE_SIZE) { > dev_err(vdev->dev, > "granule 0x%lx larger than system page size 0x%lx\n", Looks like this is messed up on 32 bit: e.g. 0x1000...

Taken from NVIDIA binary driver (Linux 64-bit, revision 390.25) from README.txt. Signed-off-by: Danilo Krummrich <danilokrummrich at dk-develop.de> --- drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c | 41 ++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c index

...v50.c:647,658 void nv50_disp_intr(struct nv50_disp *disp) { struct nvkm_device *device = disp->base.engine.subdev.device; u32 intr0 = nvkm_rd32(device, 0x610020); u32 intr1 = nvkm_rd32(device, 0x610024); while (intr0 & 0x001f0000) { u32 chid = __ffs(intr0 & 0x001f0000) - 16; nv50_disp_intr_error(disp, chid); intr0 &= ~(0x00010000 << chid); } ... } Could this be in any way related to this series of commits? commit 0a96099691c8cd1ac0744ef30b6846869dc2b566 Author: Ben Skeggs <bskeggs at re...

...e_size_mask property. > > @@ -615,7 +636,7 @@ static int viommu_domain_finalise(struct viommu_endpoint *vdev, > > struct viommu_dev *viommu = vdev->viommu; > > struct viommu_domain *vdomain = to_viommu_domain(domain); > > > > - viommu_page_size = 1UL << __ffs(viommu->pgsize_bitmap); > > + viommu_page_size = 1UL << __ffs(vdev->pgsize_bitmap); > > if (viommu_page_size > PAGE_SIZE) { > > dev_err(vdev->dev, > > "granule 0x%lx larger than system page size 0x%lx\n", > > > Looks like this...

This is an initial series of patches to improve channel recovery on Turing GPUs with the goal of improving reliability enough to eventually enable SVM for Turing. It's likely follow up patches will be required to fully address problems with less trivial workloads than what I have been able to test thus far. This series primarily addresses a number of hardware changes to interrupt layout and

...;> 8); + res = res + (res >> 16); + return (res + (res >> 32)) & 0x00000000000000FFul; +#endif +} + +static inline unsigned long hweight_long(unsigned long w) +{ + return sizeof(w) == 4 ? hweight32(w) : hweight64(w); +} + +#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG) + +/** + * __ffs - find first bit in word. + * @word: The word to search + * + * Undefined if no bit exists, so code should check against 0 first. + */ +static __always_inline unsigned long __ffs(unsigned long word) +{ + int num = 0; + +#if BITS_PER_LONG == 64 + if ((word & 0xffffffff) == 0) { + num += 32; +...

...-git a/drm/nouveau/nvkm/engine/fifo/gk104.c b/drm/nouveau/nvkm/engine/fifo/gk104.c index 441483325..669153fba 100644 --- a/drm/nouveau/nvkm/engine/fifo/gk104.c +++ b/drm/nouveau/nvkm/engine/fifo/gk104.c @@ -292,8 +292,12 @@ gk104_fifo_recover_work(struct work_struct *w) for (todo = engm; engn = __ffs(todo), todo; todo &= ~BIT(engn)) { if ((engine = fifo->engine[engn].engine)) { - nvkm_subdev_fini(&engine->subdev, false); - WARN_ON(nvkm_subdev_init(&engine->subdev)); + mutex_lock(&engine->subdev.mutex); + if (engine->usecount) { + nvkm_subdev_fini(&am...

...struct nv50_disp *disp) > { > struct nvkm_device *device = disp->base.engine.subdev.device; > u32 intr0 = nvkm_rd32(device, 0x610020); > u32 intr1 = nvkm_rd32(device, 0x610024); > > while (intr0 & 0x001f0000) { > u32 chid = __ffs(intr0 & 0x001f0000) - 16; > nv50_disp_intr_error(disp, chid); > intr0 &= ~(0x00010000 << chid); > } > ... > } > > Could this be in any way related to this series of commits? > commit 0a96099691c8cd1ac0744ef30b6846869dc2b5...

...ceed to ignore the property. Is that really OK? Wouldn't host want to know? > + > + vdev->pgsize_bitmap = pgsize_bitmap; what if bitmap is 0? Is that a valid size? I see a bunch of BUG_ON with that value ... I also see a bunch of code like e.g. this: pg_size = 1UL << __ffs(pgsize_bitmap); which probably won't DTRT on a 32 bit guest if the bitmap has bits set in the high word. > + return 0; > +} > + > static int viommu_add_resv_mem(struct viommu_endpoint *vdev, > struct virtio_iommu_probe_resv_mem *mem, > size_t len) &g...

Here is change log from V3 To V4: - Fixing spelling/grammar mistakes suggested by Randy Dunlap - Changing the hypercall interface to be able to process multiple pages per one hypercall also suggested by Randy Dunlap. It turns out that this will save lots of vmexist/memory slot flushes when protecting many pages. [PATCH RFC V4 1/3] KVM: X86: Memory ROE documentation [PATCH RFC V4 2/3] KVM:

...d bug_on or switch to global config page-size mask if this is zero (notify device which page-size-mask it is using). It's a spec violation, I wouldn't try to use the device. > > > > I also see a bunch of code like e.g. this: > > > > pg_size = 1UL << __ffs(pgsize_bitmap); > > > > which probably won't DTRT on a 32 bit guest if the bitmap has bits set in the high > > word. > > > > My thought is that in that case viommu_domain_finalise() will fail, do not proceed. That's undefined behaviour in C. You need to mak...

...continue; - r_size = r->end - r->start + 1; + r_size = resource_size(r); /* For bridges size != alignment */ align = resource_alignment(r); order = __ffs(align) - 20; diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index 1a5fc83..56e4042 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -133,7 +133,7 @@ int pci_assign_resource(struct pci_dev *dev, int resno) resource_size_t size, min, align; int ret...

...continue; - r_size = r->end - r->start + 1; + r_size = resource_size(r); /* For bridges size != alignment */ align = resource_alignment(r); order = __ffs(align) - 20; diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index 1a5fc83..56e4042 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -133,7 +133,7 @@ int pci_assign_resource(struct pci_dev *dev, int resno) resource_size_t size, min, align; int ret...