search for: __do_irq_guest

Displaying 8 results from an estimated 8 matches for "__do_irq_guest".

2007 Jun 05
13
about VIRQ & PIRQ
about VIRQ & PIRQ what is VIRQ  ?How VIRQ is different from PIRQ ?How VIRQ & PIRQ are related each other ? DISCLAIMER: ----------------------------------------------------------------------------------------------------------------------- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. It shall not attach any
2008 Jul 03
13
[PATCH] Handle MSI irq storm
<<handle_msi_irq_storm.patch>> Hi, Keir, This patch handles MSI irq storm. Unluckily, I have observed this phenomenon again. This will happen when some kind of MSI-X capable NIC is assigned to an HVM guest. The basic idea is to mask the interrupt on receiving the second interrupt and set a timer to unmask after 1ms. Can you have a look and give some comments on that? Thanks! Best
2005 Sep 06
1
interrupt handling in xen
I''m trying to understand interrupt handling in Xen (as described in the "Restructuring I/O" techreport). But I''m having a hard time finding all the bits and pieces in the code. For instance, the text says "a device''s interrupt line triggers execution of a stub routing within Xen rather than causing immediate entry into the domain that is managing that
2006 Apr 19
0
[patch] define and use cpu_test_and_clear() and some type checking fixes
...pu, addr->bits); } #define cpus_and(dst, src1, src2) __cpus_and(&(dst), &(src1), & (src2), NR_CPUS) diff -r b3ca881c903b xen/arch/x86/irq.c --- a/xen/arch/x86/irq.c Wed Apr 19 10:26:37 2006 -0400 +++ b/xen/arch/x86/irq.c Wed Apr 19 11:45:07 2006 -0400 @@ -198,7 +198,7 @@ static void __do_IRQ_guest(int vector) { d = action->guest[i]; if ( (action->ack_type != ACKTYPE_NONE) && - !test_and_set_bit(irq, &d->pirq_mask) ) + !test_and_set_bit(irq, &d->pirq_mask[0]) ) action->in_flight++; send_gu...
2008 Sep 26
2
RE: [Xen-changelog] [xen-unstable] x86: Properly synchronise updates to pirq-to-vector mapping.
...w_interrupt_type pci_msi_type; #define IOAPIC_AUTO -1 #define IOAPIC_EDGE 0 diff -r 7750906b06b3 -r 31f09a5e24cf xen/arch/x86/irq.c --- a/xen/arch/x86/irq.c Wed Sep 24 10:23:51 2008 +0100 +++ b/xen/arch/x86/irq.c Wed Sep 24 12:36:55 2008 +0100 @@ -277,6 +277,35 @@ static void __do_IRQ_guest(int vector) } } +/* + * Retrieve Xen irq-descriptor corresponding to a domain-specific irq. + * The descriptor is returned locked. This function is safe against changes + * to the per-domain irq-to-vector mapping. + */ +static irq_desc_t *domain_spin_lock_irq_desc( + struct domain *d, int...
2012 Oct 02
18
[PATCH 0/3] x86: adjust entry frame generation
This set of patches converts the way frames gets created from using PUSHes/POPs to using MOVes, thus allowing (in certain cases) to avoid saving/restoring part of the register set. While the place where the (small) win from this comes from varies between CPUs, the net effect is a 1 to 2% reduction on a combined interruption entry and exit when the full state save can be avoided. 1: use MOV
2011 Sep 07
10
[PATCH] IRQ: Group IRQ_MOVE_CLEANUP_VECTOR with other hypervisor IPIs
Also, rename to MOVE_CLEANUP_VECTOR to be in line with the other IPI names. This requires bumping LAST_HIPRIORITY_VECTOR, but does mean that the range FIRST-LAST_HIPRIORITY_VECTORs are free once again. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> diff -r 0268e7380953 -r c7884dbb6f7d xen/arch/x86/apic.c --- a/xen/arch/x86/apic.c Mon Sep 05 15:10:28 2011 +0100 +++
2011 Jan 22
53
Xen 4.1 rc1 test report
Hi, All Intel QA conducted a full validation for xen 4.1 rc1, it includes VT-x, VT-d, SRIOV, RAS, TXT and xl tools testing. 24 issues were exposed. Refer the bug list, please. We already assigned 14 bugs to Intel developers (which has an ''Intel'' tag in the bug title), most of the rest 10 bugs are related xl command. For the these bugs, need community''s help to fix