search for: __clear_bit

Displaying 20 results from an estimated 119 matches for "__clear_bit".

2007 Aug 09
0
[PATCH] x86/hvm: miscellaneous CPUID handling changes
- use __clear_bit() rather than clear_bit() - use switch statements instead of long series of if-s - eliminate pointless casts (Applies cleanly only on top of the previously sent SVM/EFER patch.) Signed-off-by: Jan Beulich <jbeulich@novell.com> Index: 2007-08-08/xen/arch/x86/hvm/hvm.c ======================...
2013 Dec 13
0
[PATCH v2] pvh: disable MTRR feature on cpuid for Dom0
...--- xen/arch/x86/traps.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 940bc33..3f7a3c7 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -796,6 +796,8 @@ void pv_cpuid(struct cpu_user_regs *regs) __clear_bit(X86_FEATURE_DS, &d); __clear_bit(X86_FEATURE_ACC, &d); __clear_bit(X86_FEATURE_PBE, &d); + if ( is_pvh_vcpu(current) ) + __clear_bit(X86_FEATURE_MTRR, &d); __clear_bit(X86_FEATURE_DTES64 % 32, &c); __clear_bit(X86_FEATURE_M...
2011 May 18
1
Re: [PATCH] x86: clear CPUID output of leaf 0xd for Dom0 when xs
...expand this function and return other information besides that XSAVEOPT, which would then be wiped out by the fall-through code. I''m thinking something like this. Let me know if I have misunderstood something. + case 0xd: /* XSAVE */ + if (!xsave_enabled(current)) + __clear_bit(X86_FEATURE_XSAVEOPT % 32, &a); + break; case 5: /* MONITOR/MWAIT */ Roger R. Cruz ---------------------- Linux starting with 2.6.36 uses the XSAVEOPT instruction and has certain code paths that look only at the feature bit reported through CPUID leaf 0xd sub-leaf 1 (i.e. without...
2008 Nov 19
0
[PATCH] support CPUID hypervisor feature bit
.../x86/traps.c =================================================================== --- 2008-10-27.orig/xen/arch/x86/traps.c 2008-10-27 11:14:44.000000000 +0100 +++ 2008-10-27/xen/arch/x86/traps.c 2008-11-19 10:16:27.000000000 +0100 @@ -754,6 +754,7 @@ static void pv_cpuid(struct cpu_user_reg __clear_bit(X86_FEATURE_XTPR % 32, &c); __clear_bit(X86_FEATURE_PDCM % 32, &c); __clear_bit(X86_FEATURE_DCA % 32, &c); + __set_bit(X86_FEATURE_HYPERVISOR % 32, &c); break; case 0x80000001: /* Modify Feature Information. */ Index: 2008-10-27/xen/in...
2012 Jan 20
2
[PATCH] xen-blkfront: use bitmap_set() and bitmap_clear()
...d; ++minor) - __set_bit(minor, minors); + bitmap_set(minors, minor, nr); rc = 0; } else rc = -EBUSY; @@ -193,8 +193,7 @@ static void xlbd_release_minors(unsigned int minor, unsigned int nr) BUG_ON(end > nr_minors); spin_lock(&minor_lock); - for (; minor < end; ++minor) - __clear_bit(minor, minors); + bitmap_clear(minors, minor, nr); spin_unlock(&minor_lock); } -- 1.7.4.4
2012 Jan 20
2
[PATCH] xen-blkfront: use bitmap_set() and bitmap_clear()
...d; ++minor) - __set_bit(minor, minors); + bitmap_set(minors, minor, nr); rc = 0; } else rc = -EBUSY; @@ -193,8 +193,7 @@ static void xlbd_release_minors(unsigned int minor, unsigned int nr) BUG_ON(end > nr_minors); spin_lock(&minor_lock); - for (; minor < end; ++minor) - __clear_bit(minor, minors); + bitmap_clear(minors, minor, nr); spin_unlock(&minor_lock); } -- 1.7.4.4
2008 Nov 04
7
[PATCH 1/1] Xen PV support for hugepages
...turn 0; } return 1; --- xen-unstable//./xen/arch/x86/traps.c 2008-11-04 08:22:40.000000000 -0600 +++ xen-hpage/./xen/arch/x86/traps.c 2008-11-04 08:24:35.000000000 -0600 @@ -723,7 +723,8 @@ static void pv_cpuid(struct cpu_user_reg { /* Modify Feature Information. */ __clear_bit(X86_FEATURE_VME, &d); - __clear_bit(X86_FEATURE_PSE, &d); + if (!opt_allow_hugepage) + __clear_bit(X86_FEATURE_PSE, &d); __clear_bit(X86_FEATURE_PGE, &d); __clear_bit(X86_FEATURE_MCE, &d); __clear_bit(X86_FEATURE_MCA, &d);...
2013 Jan 29
3
[PATCH v4 2/2] Xen: Fix VMCS setting for x2APIC mode guest while enabling APICV
...+ SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE; _vmx_secondary_exec_control = adjust_vmx_controls( @@ -659,17 +660,47 @@ void vmx_disable_intercept_for_msr(struct vcpu *v, u32 msr, int type) if ( msr <= 0x1fff ) { if (type & MSR_TYPE_R) - __clear_bit(msr, msr_bitmap + 0x000/BYTES_PER_LONG); /* read-low */ + clear_bit(msr, msr_bitmap + 0x000/BYTES_PER_LONG); /* read-low */ if (type & MSR_TYPE_W) - __clear_bit(msr, msr_bitmap + 0x800/BYTES_PER_LONG); /* write-low */ + clear_bit(msr, msr_bitmap + 0x800...
2017 Nov 03
0
[PATCH v17 2/6] radix tree test suite: add tests for xbitmap
...p++; + } + if (len) { + mask_to_clear &= BITMAP_LAST_WORD_MASK(size); + *p &= ~mask_to_clear; + } +} + +static inline __always_inline void bitmap_clear(unsigned long *map, + unsigned int start, + unsigned int nbits) +{ + if (__builtin_constant_p(nbits) && nbits == 1) + __clear_bit(start, map); + else if (__builtin_constant_p(start & 7) && IS_ALIGNED(start, 8) && + __builtin_constant_p(nbits & 7) && IS_ALIGNED(nbits, 8)) + memset((char *)map + start / 8, 0, nbits / 8); + else + __bitmap_clear(map, start, nbits); +} + static inline void bit...
2017 Dec 01
0
[PATCH v18 05/10] xbitmap: add more operations
...that the @start will also be included to be cleared. > >> +static inline __always_inline void bitmap_clear(unsigned long *map, >> + unsigned int start, >> + unsigned int nbits) >> +{ >> + if (__builtin_constant_p(nbits) && nbits == 1) >> + __clear_bit(start, map); >> + else if (__builtin_constant_p(start & 7) && IS_ALIGNED(start, 8) && >> + __builtin_constant_p(nbits & 7) && IS_ALIGNED(nbits, 8)) > It looks strange to apply __builtin_constant_p test to variables after "& 7". > I...
2011 Aug 15
36
expose MWAIT to dom0
...y: Keir Fraser <keir.fraser@citrix.com> diff -r d5589865bfce -r 777f294e3be8 xen/arch/x86/traps.c --- a/xen/arch/x86/traps.c Tue May 06 10:19:10 2008 +0100 +++ b/xen/arch/x86/traps.c Tue May 06 10:25:34 2008 +0100 @@ -713,8 +713,7 @@ static int emulate_forced_invalid_op(str __clear_bit(X86_FEATURE_PBE, &d); __clear_bit(X86_FEATURE_DTES64 % 32, &c); - if ( !IS_PRIV(current->domain) ) - __clear_bit(X86_FEATURE_MWAIT % 32, &c); + __clear_bit(X86_FEATURE_MWAIT % 32, &c); __clear_bit(X86_FEATURE_DSCPL % 32, &c);...
2015 Oct 09
4
[PATCH 1/2] kvm/x86: Hyper-V synthetic interrupt controller
...+ */ > + > + if (!(data & HV_SYNIC_SINT_MASKED)) { > + __set_bit(vector, synic->vec_bitmap); > + if (data & HV_SYNIC_SINT_AUTO_EOI) > + __set_bit(vector, synic->auto_eoi_bitmap); > + } else { > + if (!synic_has_active_vector(synic, vector, sint, 0)) > + __clear_bit(vector, synic->vec_bitmap); > + if (!synic_has_active_vector(synic, vector, sint, > + HV_SYNIC_SINT_AUTO_EOI)) > + __clear_bit(vector, synic->auto_eoi_bitmap); I think you could do the clears after the atomic64_set? Then you do not need anymore the third argument to syn...
2015 Oct 09
4
[PATCH 1/2] kvm/x86: Hyper-V synthetic interrupt controller
...+ */ > + > + if (!(data & HV_SYNIC_SINT_MASKED)) { > + __set_bit(vector, synic->vec_bitmap); > + if (data & HV_SYNIC_SINT_AUTO_EOI) > + __set_bit(vector, synic->auto_eoi_bitmap); > + } else { > + if (!synic_has_active_vector(synic, vector, sint, 0)) > + __clear_bit(vector, synic->vec_bitmap); > + if (!synic_has_active_vector(synic, vector, sint, > + HV_SYNIC_SINT_AUTO_EOI)) > + __clear_bit(vector, synic->auto_eoi_bitmap); I think you could do the clears after the atomic64_set? Then you do not need anymore the third argument to syn...
2016 Mar 21
0
[PATCH v2 14/18] mm/balloon: use general movable page feature into balloon
...p;page->flags); + atomic_set(&page->_mapcount, PAGE_MOVABLE_MAPCOUNT_VALUE); } -static inline void __ClearPageBalloon(struct page *page) +static inline void __ClearPageMovable(struct page *page) { - VM_BUG_ON_PAGE(!PageBalloon(page), page); atomic_set(&page->_mapcount, -1); + __clear_bit(PG_movable, &(page)->flags); } -#define PAGE_MOVABLE_MAPCOUNT_VALUE (-255) +PAGEFLAG(Isolated, isolated, PF_ANY); -static inline int PageMovable(struct page *page) +static inline int PageBalloon(struct page *page) { - return ((test_bit(PG_movable, &(page)->flags) && - a...
2013 Jul 14
9
[LLVMdev] [PATCH] x86/asm: avoid mnemonics without type suffix
...MASK(nr))); } else { - asm volatile(LOCK_PREFIX "btr %1,%0" + asm volatile(LOCK_PREFIX "btrl %1,%0" : BITOP_ADDR(addr) : "Ir" (nr)); } @@ -126,7 +126,7 @@ static inline void clear_bit_unlock(unsigned nr, volatile unsigned long *addr) static inline void __clear_bit(int nr, volatile unsigned long *addr) { - asm volatile("btr %1,%0" : ADDR : "Ir" (nr)); + asm volatile("btrl %1,%0" : ADDR : "Ir" (nr)); } /* @@ -198,7 +198,7 @@ static inline int test_and_set_bit(int nr, volatile unsigned long *addr) { int oldbit;...
2015 Oct 09
5
[PATCH 0/2] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt controller (synic) which is a building block of the Hyper-V paravirtualized device bus (vmbus). Synic is a lapic extension, which is controlled via MSRs and maintains for each vCPU - 16 synthetic interrupt "lines" (SINT's); each can be configured to trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 09
5
[PATCH 0/2] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt controller (synic) which is a building block of the Hyper-V paravirtualized device bus (vmbus). Synic is a lapic extension, which is controlled via MSRs and maintains for each vCPU - 16 synthetic interrupt "lines" (SINT's); each can be configured to trigger a specific interrupt vector optionally with auto-EOI
2017 Nov 03
1
[PATCH v17 1/6] lib/xbitmap: Introduce xbitmap
...> + return; > + tmp &= ~(1UL << ebit); > + if (tmp == RADIX_TREE_EXCEPTIONAL_ENTRY) > + __radix_tree_delete(root, node, slot); > + else > + rcu_assign_pointer(*slot, (void *)tmp); > + return; > + } > + > + if (!bitmap) > + return; > + > + __clear_bit(bit, bitmap->bitmap); > + if (bitmap_empty(bitmap->bitmap, IDA_BITMAP_BITS)) { Please write locking rules, in order to explain how double kfree() and/or use-after-free can be avoided. > + kfree(bitmap); > + __radix_tree_delete(root, node, slot); > + } > +} > +void xb_...
2017 Nov 03
1
[PATCH v17 1/6] lib/xbitmap: Introduce xbitmap
...> + return; > + tmp &= ~(1UL << ebit); > + if (tmp == RADIX_TREE_EXCEPTIONAL_ENTRY) > + __radix_tree_delete(root, node, slot); > + else > + rcu_assign_pointer(*slot, (void *)tmp); > + return; > + } > + > + if (!bitmap) > + return; > + > + __clear_bit(bit, bitmap->bitmap); > + if (bitmap_empty(bitmap->bitmap, IDA_BITMAP_BITS)) { Please write locking rules, in order to explain how double kfree() and/or use-after-free can be avoided. > + kfree(bitmap); > + __radix_tree_delete(root, node, slot); > + } > +} > +void xb_...
2016 Mar 21
1
[PATCH v2 14/18] mm/balloon: use general movable page feature into balloon
Hi Minchan, [auto build test ERROR on next-20160318] [cannot apply to v4.5-rc7 v4.5-rc6 v4.5-rc5 v4.5] [if your patch is applied to the wrong git tree, please drop us a note to help improving the system] url: https://github.com/0day-ci/linux/commits/Minchan-Kim/Support-non-lru-page-migration/20160321-143339 config: x86_64-randconfig-x000-201612 (attached as .config) reproduce: # save