search for: __builtin_prefetch

Hi, I am looking at how the PREFETCHW instruction is matched to the IR prefetch intrinsic (and __builtin_prefetch). Consider this C program: char foo[100]; int bar(void) { __builtin_prefetch(foo, 0, 0); __builtin_prefetch(foo, 0, 1); __builtin_prefetch(foo, 0, 2); __builtin_prefetch(foo, 0, 3); __builtin_prefetch(foo, 1, 0); __builtin_prefetch(foo, 1, 1); __builtin_prefetch(foo, 1...

Thanks for the details! How should we think of the case where an instruction has memory operands (in the sense that X86II::getMemoryOperandNo >=0), but doesn't have MachineMemOperands? I'm seeing an example in the case of __builtin_prefetch (lowered via SelectionDAG::getMemIntrinsicNode, which produces a MachineMemOperand) vs __builtin_ia32_gatherpfdpd, lowered through getPrefetchNode in X86ISelLowering.cpp. The latter doesn't have a MachineMemOperand. Is the latter technically a bug, maybe, and it so happens nothing is hindered...

Hello Mircea, > On 8 Mar 2018, at 18:52, Mircea Trofin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hello, > > I'm trying to understand the relationship between MachineMemOperand and, on X86, memory operands of machine instructions. The latter seem to be operands held in order by the MachineInstr, from an offset onwards - Base, Scale, Index, Displacement,

Hello, I'm trying to understand the relationship between MachineMemOperand and, on X86, memory operands of machine instructions. The latter seem to be operands held in order by the MachineInstr, from an offset onwards - Base, Scale, Index, Displacement, Segment. The former, if I understand it correctly, is used to hold a relationship back to IR load/store instructions. Is it possible to have

....uiuc.edu/pipermail/llvm-testresults/ 31. Evan Jones contributed patches to improve our doxygen output. 32. Misha renamed the llvm 'extract' tool to 'llvm-extract' (makes sense!) 33. Justin Wick contributed support for a new llvm.prefetch intrinsic. llvm-gcc now compiles __builtin_prefetch to it. 34. Andrew added llvm.ctpop,llvm.cttz and llvm.ctlz intrinsics. llvm-gcc now codegens __builtin_popcount, etc to these intrinsics. 35. Duraid contributed patches to build LLVM on HP-UX with the GNU toolchain. He also got it working with aCC, but it requires several wo...

libvorbis does not currently have any simd/vectorization. Following patches add generic framework for simd/vectorization and on top, add ARM-NEON simd vectorization using intrinsics. I was able to get over 34% performance improvement on my Beaglebone Black which is single Cortex-A8 based CPU. You can find more information on metrics and procedure I used to measure at