search for: __builtin_ia32_haddpd

I've run into an issue specifying intrinsics for AVX. Right now one can use GCCBuiltin to get automatic CBE (and other) support for emitting intrinsics as gcc builtins. It looks like this: def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">, Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>; AVX has 128-bit instructions that work exactly like SSE instructions except they have non-destructive operands. gcc defines intrinsics for 256-bit operations but does n...

...at cray.com> wrote: > I've run into an issue specifying intrinsics for AVX. > > Right now one can use GCCBuiltin to get automatic CBE (and other) > support for emitting intrinsics as gcc builtins.  It looks like > this: > >  def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">, >              Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, >                         llvm_v2f64_ty], [IntrNoMem]>; > > AVX has 128-bit instructions that work exactly like SSE instructions > except they have non-destructive operands.  gcc defines intrinsics for > 25...

...you give an example of such a scenario? In answer to your original question, it's probably just a matter of messing with the relevant generator in TableGen, relatively straightforward. Your syntax is probably insufficient, though: how will the table generator decide which intrinsic to use for __builtin_ia32_haddpd coming from a frontend? -Eli

Eli Friedman <eli.friedman at gmail.com> writes: > int_x86_avx_vhadd_pd_xmm doesn't exist on trunk. Why does it exist on > your branch if the semantics are exactly equivalent to > int_x86_sse3_hadd_pd? The register allocator can handle converting to > three-address form if the target provides the appropriate hooks. Because in some cases users may want to explicitly use