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...trin.h> /// /// This intrinsic corresponds to the <c> VHADDPS </c> instruction. /// /// \param __a /// A 128-bit vector of [4 x float] containing one of the source operands. /// The horizontal sums of the values are stored in the lower bits of the /// destination. /// \param __b /// A 128-bit vector of [4 x float] containing one of the source operands. /// The horizontal sums of the values are stored in the upper bits of the /// destination. /// \returns A 128-bit vector of [4 x float] containing the horizontal sums of /// both operands. static __inline__ __m12...

Thanks Serge! This means for every new intrinsic set, a systematic change should be made to LLVM to support the new intrinsic set, right? The change should include frontend change, IR instruction set change, as well as low level code generation changes? On Tue, Jan 9, 2018 at 12:39 AM, serge guelton via llvm-dev < llvm-dev at lists.llvm.org> wrote: > > The vast majority of the

Hi Craig, Thank you very much for your answer. I did not want to discuss exactly the semantic and name of one operation but instead raise the question "would it be beneficial to have more vector builtins?". You wrote that the compiler will recognize a pattern and replace it by __builtin_ia32_haddps when possible, but how can I be sure of that? I would have to disassemble the generated code right? It is very impractical isn'it? And it leads me to understand that each CPU target has a bank of patterns which it can recognize but wouldn't it be very similar to have advan...

..../include/c++/4.8/utility:70: In file included from /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/bits/stl_pair.h:59: /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/bits/move.h:185:5: error: conflicting types for 'swap' swap(_Tp (&__a)[_Nm], _Tp (&__b)[_Nm]) ^ /usr/lib/gcc/x86_64-linux-gnu/4.8/../../../../include/c++/4.8/bits/move.h:166:5: note: previous definition is here swap(_Tp& __a, _Tp& __b) -------------------------------------------------------------------------------- In file included from LLVMDIBuilder.cpp:16: In fil...

...7690&r1=267689&r2=267690&view=diff ============================================================================== --- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Wed Apr 27 05:44:15 2016 @@ -2185,6 +2185,10 @@ TARGET_BUILTIN(__builtin_ia32_kortestzhi TARGET_BUILTIN(__builtin_ia32_kunpckhi, "UsUsUs","","avx512f") TARGET_BUILTIN(__builtin_ia32_kxnorhi, "UsUsUs","","avx512f") TARGET_BUILTIN(__builtin_ia32_kxorhi, "UsUsUs","","avx512f"...

...n 4, !tbaa !1 store i32 %1, i32* %max_value.sroa.0 for.body: %max_value.sroa.0.0.max_value.sroa.0.0.6 = load i32, i32* %max_value.sroa.0 %3 = bitcast i32 %max_value.sroa.0.0.max_value.sroa.0.0.6 to float %max_value.sroa.0.0.max_value.sroa_cast8 = bitcast i32* %max_value.sroa.0 to float* %__b.__a.i = select i1 %cmp.i, float* %arrayidx1, float* %max_value.sroa.0.0.max_value.sroa_cast8 %5 = bitcast float* %__b.__a.i to i32* %6 = load i32, i32* %5, align 4, !tbaa !1 store i32 %6, i32* %max_value.sroa.0 -------------------- After SROA when Canonicalization is turned off--------------...

...7690&r1=267689&r2=267690&view=diff ============================================================================== --- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Wed Apr 27 05:44:15 2016 @@ -2185,6 +2185,10 @@ TARGET_BUILTIN(__builtin_ia32_kortestzhi TARGET_BUILTIN(__builtin_ia32_kunpckhi, "UsUsUs","","avx512f") TARGET_BUILTIN(__builtin_ia32_kxnorhi, "UsUsUs","","avx512f") TARGET_BUILTIN(__builtin_ia32_kxorhi, "UsUsUs","","avx512f"...

...pt<llvm::BasicB lock, llvm::BasicBlock*>*)this)- >__gnu_cxx::_EqualOpConcept<llvm::BasicBlock, ll vm::BasicBlock*>::__a == ((__gnu_cxx::_EqualOpConcept<llvm::BasicBlock, llvm::Ba sicBlock*>*)this)->__gnu_cxx::_EqualOpConcept<llvm::BasicBlock, llvm::BasicBlock *>::__b' c:/Users/Greybird/Desktop/llvm/llvm-2.4/include/llvm/ADT/APInt.h:1379: note: can didates are: bool llvm::operator==(uint64_t, const llvm::APInt&) make[1]: *** [/c/Users/Greybird/Desktop/llvm/llvm-2.4/lib/VMCore/ Release/BasicBl ock.o] Error 1 make[1]: Leaving directory `/c/Users/Greybir...

..._value.sroa.0 > > for.body: > %max_value.sroa.0.0.max_value.sroa.0.0.6 = load i32, i32* > %max_value.sroa.0 > %3 = bitcast i32 %max_value.sroa.0.0.max_value.sroa.0.0.6 to float > %max_value.sroa.0.0.max_value.sroa_cast8 = bitcast i32* > %max_value.sroa.0 to float* > %__b.__a.i = select i1 %cmp.i, float* %arrayidx1, float* > %max_value.sroa.0.0.max_value.sroa_cast8 > %5 = bitcast float* %__b.__a.i to i32* > %6 = load i32, i32* %5, align 4, !tbaa !1 > store i32 %6, i32* %max_value.sroa.0 > > -------------------- After SROA when Canonicalizatio...

...qualOpConcept<llvm::BasicBlock, llvm::BasicBlock*>*)this)->__gnu_cxx::_EqualOpConcept<llvm::BasicBlock, llvm::BasicBlock*>::__a == ((__gnu_cxx::_EqualOpConcept<llvm::BasicBlock, llvm::BasicBlock*>*)this)->__gnu_cxx::_EqualOpConcept<llvm::BasicBlock, llvm::BasicBlock*>::__b’ llvm-2.7/include/llvm/ADT/APInt.h:1448: note: candidates are: bool llvm::operator==(uint64_t, const llvm::APInt&) llvm-2.7/include/llvm/ADT/StringRef.h:400: note: bool llvm::operator==(llvm::StringRef, llvm::StringRef) make[1]: *** [llvm-2.7/lib/VMCore/Release/BasicBlock.o] Err...

...::BasicBlock*>*)this)- > >__gnu_cxx::_EqualOpConcept<llvm::BasicBlock, ll > vm::BasicBlock*>::__a == > ((__gnu_cxx::_EqualOpConcept<llvm::BasicBlock, llvm::Ba > sicBlock*>*)this)->__gnu_cxx::_EqualOpConcept<llvm::BasicBlock, > llvm::BasicBlock > *>::__b' > c:/Users/Greybird/Desktop/llvm/llvm-2.4/include/llvm/ADT/APInt.h: > 1379: note: can > didates are: bool llvm::operator==(uint64_t, const llvm::APInt&) > make[1]: *** [/c/Users/Greybird/Desktop/llvm/llvm-2.4/lib/VMCore/ > Release/BasicBl > ock.o] Error 1 > make[1]:...

...alignof_is_defined > +2148 // This is C11: picky compilers may warn. > +2149 size_t ld_align = alignof(long double); > +2150 #elif __GNUC__ > +2151 // This is C99, but do not rely on it. > +2152 size_t ld_align = offsetof(struct { char __a; long double > __b; }, __b); > +2153 #else This is a hint/hack - with xlc V11 I get past a syntax "failure" with something like the following: #if __alignof_is_defined long double ldbl = 0.0; // This is C11: picky compilers may warn. size_t ld_align = alignof(ldbl); #elif __GNUC__...

...%max_value.sroa.0.0.max_value.sroa.0.0.6 = load i32, i32* >>> %max_value.sroa.0 >>> %3 = bitcast i32 %max_value.sroa.0.0.max_value.sroa.0.0.6 to float >>> %max_value.sroa.0.0.max_value.sroa_cast8 = bitcast i32* >>> %max_value.sroa.0 to float* >>> %__b.__a.i = select i1 %cmp.i, float* %arrayidx1, float* >>> %max_value.sroa.0.0.max_value.sroa_cast8 >>> %5 = bitcast float* %__b.__a.i to i32* >>> %6 = load i32, i32* %5, align 4, !tbaa !1 >>> store i32 %6, i32* %max_value.sroa.0 >>> >>> ----...

...u_cxx::_EqualOpConcept<llvm::BasicBlock, ll >>> >> vm::BasicBlock*>::__a == >> ((__gnu_cxx::_EqualOpConcept<llvm::BasicBlock, llvm::Ba >> sicBlock*>*)this)->__gnu_cxx::_EqualOpConcept<llvm::BasicBlock, >> llvm::BasicBlock >> *>::__b' >> c:/Users/Greybird/Desktop/llvm/llvm-2.4/include/llvm/ADT/APInt.h: >> BasicBlock is failing the EqualityComparable concept check. This should be breaking --enable-asserts and --enable-expensive-checks, not --enable-optimized (concept checks should be disabled in release...

....max_value.sroa.0.0.6 = load i32, i32* >>>> %max_value.sroa.0 >>>> %3 = bitcast i32 %max_value.sroa.0.0.max_value.sroa.0.0.6 to float >>>> %max_value.sroa.0.0.max_value.sroa_cast8 = bitcast i32* >>>> %max_value.sroa.0 to float* >>>> %__b.__a.i = select i1 %cmp.i, float* %arrayidx1, float* >>>> %max_value.sroa.0.0.max_value.sroa_cast8 >>>> %5 = bitcast float* %__b.__a.i to i32* >>>> %6 = load i32, i32* %5, align 4, !tbaa !1 >>>> store i32 %6, i32* %max_value.sroa.0 >>>&g...

...007: instantiated from here c:\mingw\bin\../lib/gcc/mingw32/4.3.0/include/c++/bits/ boost_concept_check.h:208 : error: using invalid field '__gnu_cxx::_SGIAssignableConcept<_Tp>::__a' c:\mingw\bin\../lib/gcc/mingw32/4.3.0/include/c++/bits/ boost_concept_check.h:208 : error: '__b' has incomplete type c:\mingw\bin\../lib/gcc/mingw32/4.3.0/include/c++/bits/ boost_concept_check.h:209 : error: using invalid field '__gnu_cxx::_SGIAssignableConcept<_Tp>::__a' c:\mingw\bin\../lib/gcc/mingw32/4.3.0/include/c++/bits/ boost_concept_check.h:209 : error: using inv...

...t;> >> for.body: >> %max_value.sroa.0.0.max_value.sroa.0.0.6 = load i32, i32* %max_value.sroa.0 >> %3 = bitcast i32 %max_value.sroa.0.0.max_value.sroa.0.0.6 to float >> %max_value.sroa.0.0.max_value.sroa_cast8 = bitcast i32* %max_value.sroa.0 to float* >> %__b.__a.i = select i1 %cmp.i, float* %arrayidx1, float* %max_value.sroa.0.0.max_value.sroa_cast8 >> %5 = bitcast float* %__b.__a.i to i32* >> %6 = load i32, i32* %5, align 4, !tbaa !1 >> store i32 %6, i32* %max_value.sroa.0 >> >> -------------------- After SROA when...

https://bugzilla.mindrot.org/show_bug.cgi?id=1386 Summary: OpenSSH 4.7p1 compile error in atomicio.c under Tru64 4.0f Classification: Unclassified Product: Portable OpenSSH Version: 4.7p1 Platform: Alpha OS/Version: Tru64 Status: NEW Severity: major Priority: P2 Component: Build

...>>> %max_value.sroa.0.0.max_value.sroa.0.0.6 = load i32, i32* %max_value.sroa.0 >>>> %3 = bitcast i32 %max_value.sroa.0.0.max_value.sroa.0.0.6 to float >>>> %max_value.sroa.0.0.max_value.sroa_cast8 = bitcast i32* %max_value.sroa.0 to float* >>>> %__b.__a.i = select i1 %cmp.i, float* %arrayidx1, float* %max_value.sroa.0.0.max_value.sroa_cast8 >>>> %5 = bitcast float* %__b.__a.i to i32* >>>> %6 = load i32, i32* %5, align 4, !tbaa !1 >>>> store i32 %6, i32* %max_value.sroa.0 >>>> >>>&...

...gt;>> %3 = bitcast i32 >>> %max_value.sroa.0.0.max_value.sroa.0.0.6 to float >>> %max_value.sroa.0.0.max_value.sroa_cast8 = bitcast >>> i32* %max_value.sroa.0 to float* >>> %__b.__a.i = select i1 %cmp.i, float* %arrayidx1, >>> float* %max_value.sroa.0.0.max_value.sroa_cast8 >>> %5 = bitcast float* %__b.__a.i to i32* >>> %6 = load i32, i32* %5, align 4, !tbaa !1 >>> sto...