Displaying 11 results from an estimated 11 matches for "_________p1".
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2016 Jan 15
2
[v3,11/41] mips: reuse asm-generic/barrier.h
...enario in "DATA DEPENDENCY BARRIERS" section and
> > >>fails.
> > >The trick is that lockless_dereference() contains an
> > >smp_read_barrier_depends():
> > >
> > >#define lockless_dereference(p) \
> > >({ \
> > > typeof(p) _________p1 = READ_ONCE(p); \
> > > smp_read_barrier_depends(); /* Dependency order vs. p above. */ \
> > > (_________p1); \
> > >})
> > >
> > >Or am I missing your point?
> >
> > WRC+addr+addr has no any barrier. lockless_dereference() has a
> >...
2016 Jan 15
2
[v3,11/41] mips: reuse asm-generic/barrier.h
...enario in "DATA DEPENDENCY BARRIERS" section and
> > >>fails.
> > >The trick is that lockless_dereference() contains an
> > >smp_read_barrier_depends():
> > >
> > >#define lockless_dereference(p) \
> > >({ \
> > > typeof(p) _________p1 = READ_ONCE(p); \
> > > smp_read_barrier_depends(); /* Dependency order vs. p above. */ \
> > > (_________p1); \
> > >})
> > >
> > >Or am I missing your point?
> >
> > WRC+addr+addr has no any barrier. lockless_dereference() has a
> >...
2016 Jan 14
3
[v3,11/41] mips: reuse asm-generic/barrier.h
...ily changed to different scenario which
>> fits some of scenario in "DATA DEPENDENCY BARRIERS" section and
>> fails.
> The trick is that lockless_dereference() contains an
> smp_read_barrier_depends():
>
> #define lockless_dereference(p) \
> ({ \
> typeof(p) _________p1 = READ_ONCE(p); \
> smp_read_barrier_depends(); /* Dependency order vs. p above. */ \
> (_________p1); \
> })
>
> Or am I missing your point?
WRC+addr+addr has no any barrier. lockless_dereference() has a barrier.
I don't see a common points between this and that in your answ...
2016 Jan 14
3
[v3,11/41] mips: reuse asm-generic/barrier.h
...ily changed to different scenario which
>> fits some of scenario in "DATA DEPENDENCY BARRIERS" section and
>> fails.
> The trick is that lockless_dereference() contains an
> smp_read_barrier_depends():
>
> #define lockless_dereference(p) \
> ({ \
> typeof(p) _________p1 = READ_ONCE(p); \
> smp_read_barrier_depends(); /* Dependency order vs. p above. */ \
> (_________p1); \
> })
>
> Or am I missing your point?
WRC+addr+addr has no any barrier. lockless_dereference() has a barrier.
I don't see a common points between this and that in your answ...
2016 Jan 14
3
[v3,11/41] mips: reuse asm-generic/barrier.h
I need some time to understand your test examples. However,
On 01/14/2016 12:34 PM, Paul E. McKenney wrote:
>
>
> The WRC+addr+addr is OK because data dependencies are not required to be
> transitive, in other words, they are not required to flow from one CPU to
> another without the help of an explicit memory barrier.
I don't see any reliable way to fit WRC+addr+addr into
2016 Jan 14
3
[v3,11/41] mips: reuse asm-generic/barrier.h
I need some time to understand your test examples. However,
On 01/14/2016 12:34 PM, Paul E. McKenney wrote:
>
>
> The WRC+addr+addr is OK because data dependencies are not required to be
> transitive, in other words, they are not required to flow from one CPU to
> another without the help of an explicit memory barrier.
I don't see any reliable way to fit WRC+addr+addr into
2016 Jan 14
0
[v3,11/41] mips: reuse asm-generic/barrier.h
...then
> after years it can be easily changed to different scenario which
> fits some of scenario in "DATA DEPENDENCY BARRIERS" section and
> fails.
The trick is that lockless_dereference() contains an
smp_read_barrier_depends():
#define lockless_dereference(p) \
({ \
typeof(p) _________p1 = READ_ONCE(p); \
smp_read_barrier_depends(); /* Dependency order vs. p above. */ \
(_________p1); \
})
Or am I missing your point?
> > Transitivity is
>
> Peter Zijlstra recently wrote: "In particular we're very much all
> 'confused' about the various notions...
2016 Jan 14
0
[v3,11/41] mips: reuse asm-generic/barrier.h
...which
> >>fits some of scenario in "DATA DEPENDENCY BARRIERS" section and
> >>fails.
> >The trick is that lockless_dereference() contains an
> >smp_read_barrier_depends():
> >
> >#define lockless_dereference(p) \
> >({ \
> > typeof(p) _________p1 = READ_ONCE(p); \
> > smp_read_barrier_depends(); /* Dependency order vs. p above. */ \
> > (_________p1); \
> >})
> >
> >Or am I missing your point?
>
> WRC+addr+addr has no any barrier. lockless_dereference() has a
> barrier. I don't see a common points...
2016 Jan 15
0
[v3,11/41] mips: reuse asm-generic/barrier.h
...RIERS" section and
> > > >>fails.
> > > >The trick is that lockless_dereference() contains an
> > > >smp_read_barrier_depends():
> > > >
> > > >#define lockless_dereference(p) \
> > > >({ \
> > > > typeof(p) _________p1 = READ_ONCE(p); \
> > > > smp_read_barrier_depends(); /* Dependency order vs. p above. */ \
> > > > (_________p1); \
> > > >})
> > > >
> > > >Or am I missing your point?
> > >
> > > WRC+addr+addr has no any barrier. lock...
2016 Jan 15
2
[v3,11/41] mips: reuse asm-generic/barrier.h
...gt; > >>fails.
> > > > >The trick is that lockless_dereference() contains an
> > > > >smp_read_barrier_depends():
> > > > >
> > > > >#define lockless_dereference(p) \
> > > > >({ \
> > > > > typeof(p) _________p1 = READ_ONCE(p); \
> > > > > smp_read_barrier_depends(); /* Dependency order vs. p above. */ \
> > > > > (_________p1); \
> > > > >})
> > > > >
> > > > >Or am I missing your point?
> > > >
> > > > WRC...
2016 Jan 15
2
[v3,11/41] mips: reuse asm-generic/barrier.h
...gt; > >>fails.
> > > > >The trick is that lockless_dereference() contains an
> > > > >smp_read_barrier_depends():
> > > > >
> > > > >#define lockless_dereference(p) \
> > > > >({ \
> > > > > typeof(p) _________p1 = READ_ONCE(p); \
> > > > > smp_read_barrier_depends(); /* Dependency order vs. p above. */ \
> > > > > (_________p1); \
> > > > >})
> > > > >
> > > > >Or am I missing your point?
> > > >
> > > > WRC...