Displaying 2 results from an estimated 2 matches for "9a6e71af".
2016 Dec 16
0
Alignment of the StoreInst
Hi Hongbin,
On 16 December 2016 at 11:57, Hongbin Zheng via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> We have an "align 4" in the StoreInst. Does this mean
> 1) the address 'A' should be aligned to 4 bytes?
> 2) the lower 2 bits of 'A' should be always 0?
Yes, these are both the same. It means the compiler will assume those
facts when reasoning about
2016 Dec 16
2
Alignment of the StoreInst
...en reasoning about what that store might do and possibly when
> choosing what instruction to use to implement it.
>
> Chers.
>
> Tim.
>
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