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b95030
2007 Apr 23
4
[LLVMdev] Instruction pattern type inference problem
I have a back end which has both scalar and vector registers that
alias each other. I'm having a problem generating the ISel from
tablegen that appears only when a vector register class is declared
to contain integer vectors. At that moment tablegen doesn't seem to
be able to infer integer types in patterns that it was able to
before, but I'm not clear on why that's the