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990464
2006 Aug 11
1
[LLVMdev] instruction scheduling for stack machines
Hi!
I'm working on an LLVM back-end for a processor with a stack machine architecture. After experimenting with code generation directly from the LLVM representation, I'm studying the target-independant code generator.
As far as I understand, there currently exists a target-independant infrastructure for legalization, instruction selection, scheduling and register allocation. It is clear