search for: 93c6b1f4

Displaying 3 results from an estimated 3 matches for "93c6b1f4".

2008 Jul 14
0
[LLVMdev] Regarding ARM CodeGen
On Jul 14, 2008, at 12:59 PM, kapil anand wrote: > Hi all, > > I am using LLVM compiler and CodeGen for generating ARM binaries. > > I was going through the code for ARM backend. I noticed that the ARM > Condition field( Bits 31-28) is generated by converting the > conditions used in icmp and branch. For example, if I have following > C Code > > int a,b,c,d;
2008 Jul 14
2
[LLVMdev] Regarding ARM CodeGen
Hi all, I am using LLVM compiler and CodeGen for generating ARM binaries. I was going through the code for ARM backend. I noticed that the ARM Condition field( Bits 31-28) is generated by converting the conditions used in icmp and branch. For example, if I have following C Code int a,b,c,d; c = a+b; if(c==0) d = a + 10; Then I get ( Assembly Instructions with opcodes only) add *cmp*
2008 Jul 15
2
[LLVMdev] Regarding ARM CodeGen
...LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20080714/93c6b1f4/attachment.html>