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2016 Nov 27
4
[RFC] Supporting ARM's SVE in LLVM
I'm sorry.. may I interrupt for a minute and try to grok things for a bit different angle.. While the VL can vary.. in practice wouldn't the cost of vectorization and width be tied more to the hardware implementation than anything else? The cost of vectorizing thread 1 vs 2 isn't likely to change? (Am I drunk and mistaken?) If the above holds true then the the length would be only