search for: 914ea0c1

Displaying 2 results from an estimated 2 matches for "914ea0c1".

2011 Jun 20
0
[LLVMdev] New Configure Option for LLVM Builds
On Jun 20, 2011, at 8:53 AM, Justin Holewinski wrote: > However, as far as I know, LLVM requires static register data that is generated from tablegen files. TableGen is not required, you can provide your own TargetRegisterInfo sub-class. That's a lot of work, though, and I wouldn't recommend it. /jakob
2011 Jun 20
2
[LLVMdev] New Configure Option for LLVM Builds
On Jun 20, 2011, at 11:47 AM, John Criswell wrote: > On 6/20/11 10:39 AM, Justin Holewinski wrote: >> >> For the PTX back-end, I would like to introduce a configure-time option to determine the number of architectural registers available to LLVM register allocation during code generation. The motivation for this is PTX is a virtual instruction set and the number of registers is