Displaying 9 results from an estimated 9 matches for "912b".
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2014 Aug 19
2
[LLVMdev] Help with definition of subregisters; spill, rematerialization and implicit uses
...oAddressInstructioPass.cpp, but then I run into stuff like this instead:
832B %vreg50:hi16<def,read-undef> = COPY %vreg0
848B ...
864B %vreg19<def,dead> = COPY %vreg50
880B %vreg19:lo16<def,read-undef> = COPY %vreg73
896B ...
912B mv_a32_r16_rmod1 %vreg19, %vreg20
...
*** Bad machine code: Multiple connected components in live interval ***
- function: fixedconv
- interval: %vreg19 [864r,864d:0)[880r,1024r:1) 0 at 864r 1 at 880r
0: valnos 0
1: valnos 1
So here, both the setting of the hi16 and lo16 parts...
2012 Oct 25
3
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...k at the :
> %vreg34<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg34 R600_Reg128:%vreg6
>
> instructions ; it gets joined to :
> 928B%vreg34<def> = COPY %vreg48:sel_y;
>
> when vreg6 and vreg48 are joined. It's right.
>
> But joining the following copy
>
> 912B%vreg32:sel_x<def,read-undef> = COPY %vreg48:sel_x; R600_Reg128:%vreg32,%vreg48
>
> updates it to
> 928B%vreg34<def> = COPY %vreg32:sel_y; R600_Reg32:%vreg34 R600_Reg128:%vreg32
>
> which is wrong. vreg32:sel_y is undef.
Well, that seems correct to me. Following the code...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...its reg also joins 128 parent reg.
If I look at the :
%vreg34<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg34 R600_Reg128:%vreg6
instructions ; it gets joined to :
928B%vreg34<def> = COPY %vreg48:sel_y;
when vreg6 and vreg48 are joined. It's right.
But joining the following copy
912B%vreg32:sel_x<def,read-undef> = COPY %vreg48:sel_x; R600_Reg128:%vreg32,%vreg48
updates it to
928B%vreg34<def> = COPY %vreg32:sel_y; R600_Reg32:%vreg34 R600_Reg128:%vreg32
which is wrong. vreg32:sel_y is undef.
Regards,
Vincent
----- Mail original -----
> De : Vincent Lejeune &l...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...l_y; R600_Reg32:%vreg34
> R600_Reg128:%vreg6
>>
>> instructions ; it gets joined to :
>> 928B%vreg34<def> = COPY %vreg48:sel_y;
>>
>> when vreg6 and vreg48 are joined. It's right.
>>
>> But joining the following copy
>>
>> 912B%vreg32:sel_x<def,read-undef> = COPY %vreg48:sel_x;
> R600_Reg128:%vreg32,%vreg48
>>
>> updates it to
>> 928B%vreg34<def> = COPY %vreg32:sel_y; R600_Reg32:%vreg34
> R600_Reg128:%vreg32
>>
>> which is wrong. vreg32:sel_y is undef.
>
> Well...
2012 Oct 25
2
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...;, %T1_Y<imp-use,kill>, %T1_X<imp-use,kill>, %T2_W<imp-use,kill>, %T2_Z<imp-use,kill>, %T2_Y<imp-use,kill>, %T2_X<imp-use,kill>
BB#3:# derived from
896B%vreg31<def> = COPY %vreg6:sel_x; R600_Reg32:%vreg31 R600_Reg128:%vreg6
register: %vreg31 +[896r,912r:0)
912B%vreg32:sel_x<def,read-undef> = COPY %vreg31<kill>; R600_Reg128:%vreg32 R600_Reg32:%vreg31
register: %vreg32 +[912r,944r:0)
928B%vreg34<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg34 R600_Reg128:%vreg6
register: %vreg34 +[928r,960r:0)
944B%vreg35<def> = COPY %vreg32<kill>...
2012 Oct 26
1
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...g128:%vreg6
>>>
>>> instructions ; it gets joined to :
>>> 928B%vreg34<def> = COPY %vreg48:sel_y;
>>>
>>> when vreg6 and vreg48 are joined. It's right.
>>>
>>> But joining the following copy
>>>
>>> 912B%vreg32:sel_x<def,read-undef> = COPY %vreg48:sel_x;
>> R600_Reg128:%vreg32,%vreg48
>>>
>>> updates it to
>>> 928B%vreg34<def> = COPY %vreg32:sel_y; R600_Reg32:%vreg34
>> R600_Reg128:%vreg32
>>>
>>> which is wrong. vreg32:sel_...
2014 Aug 15
2
[LLVMdev] Help with definition of subregisters; spill, rematerialization and implicit uses
Hi,
I have a problem regarding sub-register definitions and LiveIntervals on
our target. When a subregister is defined, other parts of the register
are always left untouched - they are neither read or def:ed.
It however seems that Codegen treats subregister definitions as somehow
clobbering the whole register.
The SSA-code looks like this after isel:
(Reg0 and Reg1 are 16bit registers. Reg2,
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...g29
> 544B%PREDICATE_BIT<def> = PRED_X %vreg30<kill>, 152, 16; R600_Reg32:%vreg30
> 560BJUMP <BB#3>, pred:%PREDICATE_BIT
> 576BJUMP <BB#2>, pred:%noreg
>
> // LOOP BODY
> 896B%vreg31<def> = COPY %vreg6:sel_x; R600_Reg32:%vreg31 R600_Reg128:%vreg6
> 912B%vreg32:sel_x<def,read-undef> = COPY %vreg31<kill>; R600_Reg128:%vreg32 R600_Reg32:%vreg31
> 928B%vreg34<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg34 R600_Reg128:%vreg6
> 944B%vreg35<def> = COPY %vreg32<kill>; R600_Reg128:%vreg35,%vreg32
> 960B%vreg35:sel_y<...
2012 Oct 24
3
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...;kill>; R600_Reg32:%vreg30,%vreg29
544B%PREDICATE_BIT<def> = PRED_X %vreg30<kill>, 152, 16; R600_Reg32:%vreg30
560BJUMP <BB#3>, pred:%PREDICATE_BIT
576BJUMP <BB#2>, pred:%noreg
// LOOP BODY
896B%vreg31<def> = COPY %vreg6:sel_x; R600_Reg32:%vreg31 R600_Reg128:%vreg6
912B%vreg32:sel_x<def,read-undef> = COPY %vreg31<kill>; R600_Reg128:%vreg32 R600_Reg32:%vreg31
928B%vreg34<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg34 R600_Reg128:%vreg6
944B%vreg35<def> = COPY %vreg32<kill>; R600_Reg128:%vreg35,%vreg32
960B%vreg35:sel_y<def> = COPY...