search for: 8d13121a8cf2

...tion handler for #VC exception that uses a GHCB. Also > add the infrastructure for handling different exit-codes by decoding > the instruction that caused the exception and error handling. > > diff --git a/arch/x86/boot/compressed/sev-es.c b/arch/x86/boot/compressed/sev-es.c > index 8d13121a8cf2..02fb6f57128b 100644 > --- a/arch/x86/boot/compressed/sev-es.c > +++ b/arch/x86/boot/compressed/sev-es.c > @@ -8,12 +8,16 @@ > #include <linux/kernel.h> > > #include <asm/sev-es.h> > +#include <asm/trap_defs.h> > #include <asm/msr-index.h> > #i...

...41,6 @@ extern struct desc_ptr boot_idt_desc; /* IDT Entry Points */ void boot_pf_handler(void); +void boot_stage1_vc_handler(void); #endif /* BOOT_COMPRESSED_MISC_H */ diff --git a/arch/x86/boot/compressed/sev-es.c b/arch/x86/boot/compressed/sev-es.c new file mode 100644 index 000000000000..8d13121a8cf2 --- /dev/null +++ b/arch/x86/boot/compressed/sev-es.c @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AMD Encrypted Register State Support + * + * Author: Joerg Roedel <jroedel at suse.de> + */ + +#include <linux/kernel.h> + +#include <asm/sev-es.h> +#include <asm...

...esc; > > /* IDT Entry Points */ > void boot_pf_handler(void); > +void boot_stage1_vc_handler(void); > > #endif /* BOOT_COMPRESSED_MISC_H */ > diff --git a/arch/x86/boot/compressed/sev-es.c b/arch/x86/boot/compressed/sev-es.c > new file mode 100644 > index 000000000000..8d13121a8cf2 > --- /dev/null > +++ b/arch/x86/boot/compressed/sev-es.c > @@ -0,0 +1,42 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * AMD Encrypted Register State Support > + * > + * Author: Joerg Roedel <jroedel at suse.de> > + */ > + > +#include <linux/kernel.h...

...esc; > > /* IDT Entry Points */ > void boot_pf_handler(void); > +void boot_stage1_vc_handler(void); > > #endif /* BOOT_COMPRESSED_MISC_H */ > diff --git a/arch/x86/boot/compressed/sev-es.c b/arch/x86/boot/compressed/sev-es.c > new file mode 100644 > index 000000000000..8d13121a8cf2 > --- /dev/null > +++ b/arch/x86/boot/compressed/sev-es.c > @@ -0,0 +1,42 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * AMD Encrypted Register State Support > + * > + * Author: Joerg Roedel <jroedel at suse.de> > + */ > + > +#include <linux/kernel.h...

...143,6 @@ extern struct desc_ptr boot_idt_desc; /* IDT Entry Points */ void boot_pf_handler(void); void boot_stage1_vc_handler(void); +void boot_stage2_vc_handler(void); #endif /* BOOT_COMPRESSED_MISC_H */ diff --git a/arch/x86/boot/compressed/sev-es.c b/arch/x86/boot/compressed/sev-es.c index 8d13121a8cf2..02fb6f57128b 100644 --- a/arch/x86/boot/compressed/sev-es.c +++ b/arch/x86/boot/compressed/sev-es.c @@ -8,12 +8,16 @@ #include <linux/kernel.h> #include <asm/sev-es.h> +#include <asm/trap_defs.h> #include <asm/msr-index.h> #include <asm/ptrace.h> #include <a...

Hi, here is the first public post of the patch-set to enable Linux to run under SEV-ES enabled hypervisors. The code is mostly feature-complete, but there are still a couple of bugs to fix. Nevertheless, given the size of the patch-set, I think it is about time to ask for initial feedback of the changes that come with it. To better understand the code here is a quick explanation of SEV-ES first.

Hi, here is the first public post of the patch-set to enable Linux to run under SEV-ES enabled hypervisors. The code is mostly feature-complete, but there are still a couple of bugs to fix. Nevertheless, given the size of the patch-set, I think it is about time to ask for initial feedback of the changes that come with it. To better understand the code here is a quick explanation of SEV-ES first.