Displaying 4 results from an estimated 4 matches for "8ceec8d".
2015 Apr 30
0
[PATCH 1/6] x86: use macro instead of "0" for setting TICKET_SLOWPATH_FLAG
...Signed-off-by: Juergen Gross <jgross at suse.com>
---
arch/x86/include/asm/spinlock.h | 3 ++-
arch/x86/include/asm/spinlock_types.h | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h
index cf87de3..8ceec8d 100644
--- a/arch/x86/include/asm/spinlock.h
+++ b/arch/x86/include/asm/spinlock.h
@@ -46,7 +46,8 @@ static __always_inline bool static_key_false(struct static_key *key);
static inline void __ticket_enter_slowpath(arch_spinlock_t *lock)
{
- set_bit(0, (volatile unsigned long *)&lock->tic...
2015 Apr 30
0
[PATCH 2/6] x86: move decision about clearing slowpath flag into arch_spin_lock()
...() and the slowpath flag isn't
set.
Signed-off-by: Juergen Gross <jgross at suse.com>
---
arch/x86/include/asm/spinlock.h | 23 +++++++++++------------
1 file changed, 11 insertions(+), 12 deletions(-)
diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h
index 8ceec8d..268b9da 100644
--- a/arch/x86/include/asm/spinlock.h
+++ b/arch/x86/include/asm/spinlock.h
@@ -66,20 +66,18 @@ static inline int __tickets_equal(__ticket_t one, __ticket_t two)
return !((one ^ two) & ~TICKET_SLOWPATH_FLAG);
}
-static inline void __ticket_check_and_clear_slowpath(arch_spi...
2015 Apr 30
12
[PATCH 0/6] x86: reduce paravirtualized spinlock overhead
Paravirtualized spinlocks produce some overhead even if the kernel is
running on bare metal. The main reason are the more complex locking
and unlocking functions. Especially unlocking is no longer just one
instruction but so complex that it is no longer inlined.
This patch series addresses this issue by adding two more pvops
functions to reduce the size of the inlined spinlock functions. When
2015 Apr 30
12
[PATCH 0/6] x86: reduce paravirtualized spinlock overhead
Paravirtualized spinlocks produce some overhead even if the kernel is
running on bare metal. The main reason are the more complex locking
and unlocking functions. Especially unlocking is no longer just one
instruction but so complex that it is no longer inlined.
This patch series addresses this issue by adding two more pvops
functions to reduce the size of the inlined spinlock functions. When