search for: 8c13226a

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2015 Sep 06
2
POssible bug in the Arm code generator
Hi all, I do a little work on the Glasgow Haskell Compiler (GHC) which uses LLVM for the backend when compiling for Arm and some other targets. The reason I am posting to this list is that a GHC compiled program (using the LLVM backend) is getting an illegal instruction exception on the this instruction: ldr r0, [r0] According to the Arm archtecture manual: