Displaying 4 results from an estimated 4 matches for "8691b68".
2015 Nov 03
3
[PATCH 1/2] disp: activate dual link TMDS links only when possible
...;
- else
- proto = 0x5;
+ proto = 0x1;
+ if (mode->clock >= 165000 &&
+ nv_encoder->dcb->duallink_possible)
+ proto |= 0x4;
} else {
proto = 0x2;
}
diff --git a/drm/nouveau/nvkm/engine/disp/gf119.c b/drm/nouveau/nvkm/engine/disp/gf119.c
index 186fd3a..8691b68 100644
--- a/drm/nouveau/nvkm/engine/disp/gf119.c
+++ b/drm/nouveau/nvkm/engine/disp/gf119.c
@@ -158,7 +158,7 @@ exec_clkcmp(struct nv50_disp *disp, int head, int id, u32 pclk, u32 *conf)
switch (outp->info.type) {
case DCB_OUTPUT_TMDS:
*conf = (ctrl & 0x00000f00) >> 8;
- if (p...
2015 Nov 04
1
[PATCH 1/2] disp: activate dual link TMDS links only when possible
.... Is there some
other way of telling whether we're on HDMI or DVI?
>
>> } else {
>> proto = 0x2;
>> }
>> diff --git a/drm/nouveau/nvkm/engine/disp/gf119.c b/drm/nouveau/nvkm/engine/disp/gf119.c
>> index 186fd3a..8691b68 100644
>> --- a/drm/nouveau/nvkm/engine/disp/gf119.c
>> +++ b/drm/nouveau/nvkm/engine/disp/gf119.c
>> @@ -158,7 +158,7 @@ exec_clkcmp(struct nv50_disp *disp, int head, int id, u32 pclk, u32 *conf)
>> switch (outp->info.type) {
>> case DCB_OUTPUT_TMDS:
&g...
2015 Nov 04
0
[PATCH 1/2] disp: activate dual link TMDS links only when possible
...dition, given that one could plug a
single-link HDMI monitor into a duallink-capable TMDS connector.
Still, it's an improvement :)
> } else {
> proto = 0x2;
> }
> diff --git a/drm/nouveau/nvkm/engine/disp/gf119.c b/drm/nouveau/nvkm/engine/disp/gf119.c
> index 186fd3a..8691b68 100644
> --- a/drm/nouveau/nvkm/engine/disp/gf119.c
> +++ b/drm/nouveau/nvkm/engine/disp/gf119.c
> @@ -158,7 +158,7 @@ exec_clkcmp(struct nv50_disp *disp, int head, int id, u32 pclk, u32 *conf)
> switch (outp->info.type) {
> case DCB_OUTPUT_TMDS:
> *conf = (ctrl & 0x...
2015 Oct 10
2
[PATCH v2 0/2] drm/nouveau: add support for 2560x1440@56 over HDMI
These patches are adding support for outputting 2560x1440 at 56 over HDMI.
This needs a pixel clock of 225 MHz which was not supported before.
This was tested in a dual monitor setup with a GF114 (GTX 560 TI) and
one HDMI monitor running with 2560x1440 at 56 and one DVI monitor running
with 1920x1200 at 60. This still needs testing on other graphics cards and
with dual link DVI.
There is no