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83.1832
2014 May 19
2
[PATCH 4/4] drm/nouveau: introduce CPU cache flushing macro
...on pushbuf kickoff anyways.
Sounds good to me.
Thierry
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2014 May 19
3
[PATCH 4/4] drm/nouveau: introduce CPU cache flushing macro
On Mon, May 19, 2014 at 04:10:58PM +0900, Alexandre Courbot wrote:
> Some architectures (e.g. ARM) need the CPU buffers to be explicitely
> flushed for a memory write to take effect. Not doing so results in
> synchronization issues, especially after writing to BOs.
It seems to me that the above is generally true for all architectures,
not just ARM.
Also: s/explicitely/explicitly/
>