Displaying 3 results from an estimated 3 matches for "80b3906b".
2013 May 08
0
[LLVMdev] Predicated Vector Operations
On Wed, May 8, 2013 at 11:32 AM, Nadav Rotem <nrotem at apple.com> wrote:
>
> On May 8, 2013, at 11:07 AM, dag at cray.com wrote:
>
> It might be as simple as adding
> an IR-level predicated load and predicated store, I'm not sure.
>
>
> I think that selects on the inputs+outputs of instructions is a good
> abstraction, and I don't think that we need to
2013 May 08
3
[LLVMdev] Predicated Vector Operations
...at a store instruction actually writes and invalidates the memory location. However, this assumption is incorrect if we are using a mask.
Thanks,
Nadav
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2013 May 08
5
[LLVMdev] Predicated Vector Operations
On May 8, 2013, at 11:07 AM, dag at cray.com wrote:
> It might be as simple as adding
> an IR-level predicated load and predicated store, I'm not sure.
I think that selects on the inputs+outputs of instructions is a good abstraction, and I don't think that we need to add a mask operand to every LLVM IR instruction. However, we do need support for masked load/stores, and I think