Displaying 1 result from an estimated 1 matches for "7a9db398".
2017 Apr 12
2
Is there a way to correlate operation to machine instruction?
Matt,
so in AMDGPU, the operands are sort of 'generic'? Can you point me to the
right places?
Thanks.
On Wed, Apr 12, 2017 at 1:36 PM, Matt Arsenault <Matthew.Arsenault at amd.com>
wrote:
> On 04/12/2017 10:25 AM, Ryan Taylor via llvm-dev wrote:
>
> For example, given a multiclass for ADD 32 bit that might produce
> something like:
>
> ADD32_REG_REG_REG