Displaying 2 results from an estimated 2 matches for "71ff1a94".
2018 Mar 02
0
generating multiple instructions for a single pattern
On 2 Mar 2018, at 11:45, Nagaraju Mekala <nagaraju.mekala87 at gmail.com> wrote:
>
> yes they are dependent if the branch immediate value is > 0xffff then
> the imm instruction should generate other wise only "br" instruction
> is enough.
This sounds as if you have two br instructions, one that takes an immediate and one that takes a register and requires that
2018 Mar 02
2
generating multiple instructions for a single pattern
On Fri, Mar 2, 2018 at 4:59 PM, David Chisnall
<David.Chisnall at cl.cam.ac.uk> wrote:
> On 2 Mar 2018, at 11:09, Nagaraju Mekala via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>>
>> I am working on a target which requires to generated two
>> instructions for a single branch instruction.
>> ex:
>> imm 1
>> br r4,0xabcd
>> branch