Displaying 2 results from an estimated 2 matches for "7115c16f".
2014 Aug 08
2
[LLVMdev] Signed NaNs in APFloat arithmetic
...> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140808/7115c16f/attachment.html>
2014 Aug 08
6
[LLVMdev] Signed NaNs in APFloat arithmetic
Is there any intention of making floating absolute and negate primitive IR
instructions?
I ask because only a few days ago I was also faced with the task of
implementing negate in my compiler, and finding no suitable IR instruction,
simply subtracted from zero. But this is wrong.
I could change my code to do the bit casting and fiddling, but I wonder:
would that be lowered appropriately on all