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2017 Feb 01
2
how to verify completeness of the llvm backend
Hello LLVM Devs, I have a question regarding porting a new target to LLVM backend. When we write a llvm backend for any new architecture then how can we verify that each type of instructions are being generated i.e particular pattern is not missing or not handled properly, every possible addressing modes are getting generated etc ? One way is that generally architecture developer team should