Displaying 3 results from an estimated 3 matches for "68r".
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686
2014 Dec 05
2
[LLVMdev] InlineSpiller.cpp bug?
...that there becomes two COPYs back to sibling value after the loop. My apologies [vregs 76->111, 87->122].
1.
The interval for %vreg111 first covers nearly the entire function. Then it gets split into two intervals, where one covers the inner loops, which makes sense.
selectOrSplit %vreg111 [68r,400B:1)[400B,688r:6)[688r,752B:4)[752B,1264r:6)[1264r,1312r:3)[1312r,1472B:2)[1472B,1520r:5)[1520r,3488B:0) 0 at 1520r 1 at 68r 2 at 1312r 3 at 1264r 4 at 688r 5 at 1472B-phi 6 at 400B-phi w=3.181050e-02
...
queuing new interval: %vreg121 [1764r,2936r:0)[2960B,2980r:0) 0 at 1764r
queuing new inte...
2014 Dec 09
2
[LLVMdev] InlineSpiller.cpp bug?
...sibling value after the loop. My apologies [vregs 76->111, 87->122].
>>
>> 1.
>> The interval for %vreg111 first covers nearly the entire function. Then it gets split into two intervals, where one covers the inner loops, which makes sense.
>> selectOrSplit %vreg111 [68r,400B:1)[400B,688r:6)[688r,752B:4)[752B,1264r:6)[1264r,1312r:3)[1312r,1472B:2)[1472B,1520r:5)[1520r,3488B:0) 0 at 1520r 1 at 68r 2 at 1312r 3 at 1264r 4 at 688r 5 at 1472B-phi 6 at 400B-phi w=3.181050e-02
>> …
>> queuing new interval: %vreg121 [1764r,2936r:0)[2960B,2980r:0) 0 at 1764r...
2014 Nov 21
2
[LLVMdev] InlineSpiller.cpp bug?
...ces in several iterations strangely back to the same register (inside a loop), finds it marked to be spilled, and the spill is cancelled:
Inline spilling %vreg86 [1396r,2276r:0) 0 at 1396r
>From original %vreg76
Tracing value %vreg86:0 at 1396r
%vreg86:0 at 1396r: copy of %vreg87:6 at 1168r kill=1
%vreg87:6 at 1168r: copy of %vreg87:5 at 1120B kill=1
%vreg87:5 at 1120B: split phi value, checking 1 phi-defs, and 2 non-phi/orig defs
%vreg87:7 at 2276r: copy of %vreg86:0 at 1396r kill=1
traced to: spill %vreg86:0 at 1396r all-reloads kill deps[ 7 at 2276r ]
Merge...