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6796
2016 Mar 10
2
Greedy register allocator allocates live sub-register
...previously allocated V15 (V15_l is a sub-register of V15) to %vreg304.
%vreg304 is defined at 6768B and finally used at 6804B so the instruction
LOAD_v4i16 at 6796B ends up clobbering the value in V15 before its last
use. This is the output of the allocator itself:
selectOrSplit VRF64_l:%vreg375 [6796r,6800r:0) 0 at 6796r w=1.#INF00e+00
assigning %vreg375 to %V15_l: V15_e0 [6796r,6800r:0) 0 at 6796r V15_e1
[6796r,6800r:0) 0 at 6796r V15_e2 [6796r,6800r:0) 0 at 6796r V15_e3
[6796r,6800r:0) 0 at 6796r
And this is the live range of %vreg304 printed just before the allocation
of %vreg375 starte...