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66115
2008 Dec 12
0
RE: [ofa-general] Infiniband performance
...ower latency processing and support for higher bandwidth PCI-E 2.0 (PCI-E is not 100% efficient so a 20Gbit PCIE connect will hold back a 20Gbit IC).
>
>
Thank you.
What TCP bandwidth did you get with the gen4 cards?
Jan
--
Jan Ruffing
Software Developer
Motama GmbH
Lortzingstraße 10 · 66111 Saarbrücken · Germany
tel +49 681 940 85 50 · fax +49 681 940 85 49
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2015 Mar 09
4
[LLVMdev] LLVM Parallel IR
On 9 March 2015 at 17:30, Tobias Grosser <tgrosser at inf.ethz.ch> wrote:
> If my memories are right, one of the critical issues (besides
> other engineering considerations) was that parallelism metadata in LLVM is
> optional and can always be dropped. However, for
> OpenMP it sometimes is incorrect to execute a loop sequential that has been
> marked parallel in the source
2015 Mar 11
2
[LLVMdev] LLVM Parallel IR
On 10 March 2015 at 08:36, Kevin Streit <streit at mailbox.org> wrote:
> Again, optimizations could break it, violating a possible contract with the user.
AFAIK, all these annotations are more hints than contracts. Adding
#pragma omp simd on a loop that has forward dependencies that cannot
be solved should not make the loop vectorize (incorrectly). Same goes
for standard OMP, threads and
2015 Mar 09
5
[LLVMdev] LLVM Parallel IR
I'm part of a research group at MIT looking to create an extension of LLVM
that inherently allows one to nicely code a parallel loop.
Most parallel frameworks tend to take the body of a parallel loop and stick
it inside of a function for the parallel runtime to call when appropriate.
However, this makes optimizations significantly more difficult as most
compiler optimizations tend to be