search for: 6502

Greetings, LLVM devs, For the past few weeks, I have been putting together a 6502 backend for LLVM. The 6502 and its derivatives, of course, have powered countless microcomputers, game consoles and arcade machines over the past 40 years. The backend is just an experimental hobby project right now. The code is available here: <https://github.com/beholdnec/llvm-m6502>. This...

I've mentioned my sneaky plans to target the MOS6502 here before. The big issue I think is that a lot of instructions don't really have a choice for output register. It all just goes into the accumulator, X index, or Y index based on the specific instruction. So, my question is, when I'm defining my ins, outs and registers for these instruc...

I suppose that once you've got a 6502 working, adding support for a 4510 shouldn't be too difficult.... (http://c65gs.blogspot.com.au/) On Fri, Jul 4, 2014 at 10:38 AM, Bruce Hoult <bruce at hoult.org> wrote: > On Fri, Jul 4, 2014 at 12:02 PM, Edwin Amsler <edwinguy at gmail.com> wrote: > >> Well, the st...

On 2/12/2016 7:23 AM, Bruce Hoult via llvm-dev wrote: > I haven't seen what you are doing, but if I was writing a back end for > the 6502, I'd lie to LLVM and describe RAM page 0 as being the real > registers, and A, X and Y as being special purpose registers used for > temporaries. How did you get the "(z), x" and "(z, y)" addressing modes to work with this scheme? The "z" is two adjacent z...

So I've been designing an experimental 6502 backend for LLVM. Link: <https://github.com/beholdnec/llvm-m6502> The 6502 only has a few registers, one accumulator and two indexes, none of which are large enough to hold an absolute pointer. Because of this, the backend really tests the power of LLVM's register allocator (RA). I'...

I never thought I’d see the day when someone proposed treating the 6502 like a GPU… —escha > On Feb 12, 2016, at 6:30 AM, Bruce Hoult via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > I think it would be sufficient to pick 8 or 16 pairs of zero page locations as the "registers". Who needs 128 registers, unless you're also doing inter-...

...he oh323 driver to answer H323 calls. The connection is set up normally. In my extensions.conf file I use: exten => s,1,Answer exten => s,2,Playback(demo-instruct) exten => s,3,Hangup So that when a call is answered i get: *CLI> -- Executing Answer("H323/ip$10.0.3.23:32782/6502", "") in new stack -- Executing Playback("H323/ip$10.0.3.23:32782/6502", "demo-instruct") in new stack -- Playing 'demo-instruct' (language 'en') which is the normal procedure. The connexion is well built between the client and asterisk (H...

Well, the stack pointer be a single byte, so pushing things on there doesn't work terribly well. Assuming I pass by reference, that's 128 values absolutely total before it wraps around and silently clobbers itself. It means single byte values will be incredibly inefficient... Tricky stuff. I'm lucky on the C64 since it's rare to exit back to the kernel with machine language apps

Inspired by Jason Turner's talk at CppCon 2016: Jason Turner “Rich Code for Tiny Computers: A Simple Commodore 64 Game in C++17” I got interested in writing a Zilog Z80 backend for LLVM. Jason actually did no such thing, but instead wrote a x86-to-6502 translator (reassembler he calls it) https://github.com/lefticus/x86-to-6502 So I'm now trying to bootstrap this project. Goal: - be able to use C++17 (or whatever is supported of that in clang-master) on my Z80 based MSX2 computer. why? you might ask, well, just because I'm a software e...

I currently have an AGI that calls the Festival text2wave app to write a wav file that my dialplan plays into a call with the Background() command. But the voice sounds terrible: like SAM, the 1980s 6502 voice synthesizer. I tried to slow it down by calling (text2wav -eval "(Parameter.set 'Duration_Stretch 1.4)" -scale 2.0 [...]), but it still sounds like it's talking while sucking down a strawful of spaghetti. How do I install a different voice, to speak basically simple emails?...

...abase* *Failed to join domain: failed to connect to AD: Server not found in Kerberos database* *[root at ESX2VMTKRHEL2 ~]#* However i am able to join the domain using either rpc in place of ads or by specifying domain controller name in place of domain controller ip . This seems to be a samba bug 6502 ( https://bugzilla.samba.org/show_bug.cgi?id=6502#c0) which is in NEW state on samba 3.0 and i am using 3.6 as shown below. [root at ESX2VMTKRHEL2 ~]# [root at ESX2VMTKRHEL2 ~]# smbstatus --version Version 3.6.23-12.el6 [root at ESX2VMTKRHEL2 ~]# So please help. ####################The conten...

Season Greetings to all Tom, in your faq, u have this noted: While I am currently using the HTB version of The Wonder Shaper (I just copied wshaper.htb to /etc/shorewall/tcstart and modified it as shown in the Wondershaper README), I treid this with wondershaper, using Bearing Leaf 1.0 stable i even changed the tc command to run_tc, and tried it in both angles, and i receive the following..

...and what the boot image can learn from the BIOS about its origin. Possibly this silently builds on MBR specs. But about those i can only find wikipedia rumors: "the CPU is in real mode and the general-purpose and segment registers are undefined" Last time i did machine code was with the 6502 of my VIC-20, because Microsoft BASIC was so darn slow. Have a nice day :) Thomas

Hi, I recently started helping with the LLVM AVR backend [1]. The AVR is an 8 bit core with pointer type i16. That makes pointers illegal in the SelectionDAG. As far as I understand it, it is the backends job to legalize these nodes by using the ReplaceNodeResults/LowerOperation callbacks. Is that about right? I have the feeling that the symbolic nodes carrying pointers, like FrameIndex are

...t a Windows 2008 R2 domain controller. I've been asked to get Kerberized NFSv4 working, but this problem occurs on mounts both with and without Kerberos, so I won't torture anyone with the Kerberos part. :-) ID mapping works: [joeuser at nfsclient ~]$ id joeuser uid=56055(joeuser) gid=6502(domain users) groups=6502(domain users),1000001(BUILTIN\users) Mounting directories -o sec=none works: [joeuser at nfsclient ~]$ sudo mount -t nfs4 -o proto=tcp,port=2049 -o sec=none nfsserver.example.com:/testdir /mnt [joeuser at nfsclient ~]$ ls -l /mnt drwx------ 2 user1 domain users...

...rded. In general, if the compiler needs a > register or some purpose it does not matter what the purpose is, the > compiler can just grab the next available register and use it, without > regard for what other registers are in use or what they are being used > for. > > Compare to 6502. There is a stack pointer that can't be directly > accessed, but only used in push and pop and transferred to or from > another register. There is a condition code register that can only be > accessed implicitly or by pushing or popping it to the stack. > Arithmetic such as add/siub...

Dear All, I am trying to custom lower 32-bit ISD::SHL and SHR in a backend for 6502 family CPUs. The particular subtarget has 16-bit registers at most, so a 32-bit result is not legal. Normally, if you mark this as "Legal" or "Expand", then it will expand the node into a more nodes as follows in an example: shl i32 %a , 2 => high_sdvalue = (or (shr %b, 14)...

Not only do FPGAs not support recursion, we don’t even support calls! All user code must be inlined into one kernel/component, which is then used to create HDL for the FPGA. Mark From: Bruce Hoult <brucehoult at sifive.com> Sent: December 17, 2018 9:28 AM To: Mendell, Mark P <mark.p.mendell at intel.com> Cc: jjones at prc-hsv.com; LLVM Developers Mailing List <llvm-dev at

Hello all on the list, I’m developing a backend for the 65816, however, I need a way to store some state, as processor flags can affect how instructions operate (including the length of some), as well as the calling convention. I need to track for each of these flags (x, m, and e) Set, Unset, Indeterminate. I was wondering if there was a nice way to store this with the MBB, so I can make sure

...solved yet. It would be great to have an in-tree LLVM backend with a non-legal pointer type so that solutions to these problems were more likely to happen! > > We maintain an out of tree backend for at least one target that has an i64 pointer type but for which i64 is illegal (much like AVR, 6502, etc). Unfortunately, the solution is extremely ugly; it lowers loads and stores during combine1 (before legalization), which is way less than ideal. It also uses 32-bit frameindexes (it treats the stack as 32-bit despite global pointers being 64-bit), so I don’t think that provides a usable templa...