Displaying 20 results from an estimated 54 matches for "65,13".
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65,14
2020 Aug 24
2
[PATCH 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
...s(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/dispnv50/core507d.c b/drivers/gpu/drm/nouveau/dispnv50/core507d.c
> index e341f572c2696..5e86feec3b720 100644
> --- a/drivers/gpu/drm/nouveau/dispnv50/core507d.c
> +++ b/drivers/gpu/drm/nouveau/dispnv50/core507d.c
> @@ -65,13 +65,26 @@ core507d_ntfy_init(struct nouveau_bo *bo, u32 offset)
> int
> core507d_caps_init(struct nouveau_drm *drm, struct nv50_disp *disp)
> {
> - u32 *push = evo_wait(&disp->core->chan, 2);
> + struct nv50_core *core = disp->core;
> + u32 int...
2020 Aug 31
1
[PATCH 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
.../drm/nouveau/dispnv50/core507d.c
> > > b/drivers/gpu/drm/nouveau/dispnv50/core507d.c
> > > index e341f572c2696..5e86feec3b720 100644
> > > --- a/drivers/gpu/drm/nouveau/dispnv50/core507d.c
> > > +++ b/drivers/gpu/drm/nouveau/dispnv50/core507d.c
> > > @@ -65,13 +65,26 @@ core507d_ntfy_init(struct nouveau_bo *bo, u32 offset)
> > > int
> > > core507d_caps_init(struct nouveau_drm *drm, struct nv50_disp *disp)
> > > {
> > > - u32 *push = evo_wait(&disp->core->chan, 2);
> > > + struct nv5...
2020 Aug 24
0
[PATCH 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
...1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/core507d.c b/drivers/gpu/drm/nouveau/dispnv50/core507d.c
index e341f572c2696..5e86feec3b720 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/core507d.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/core507d.c
@@ -65,13 +65,26 @@ core507d_ntfy_init(struct nouveau_bo *bo, u32 offset)
int
core507d_caps_init(struct nouveau_drm *drm, struct nv50_disp *disp)
{
- u32 *push = evo_wait(&disp->core->chan, 2);
+ struct nv50_core *core = disp->core;
+ u32 interlock[NV50_DISP_INTERLOCK__SIZE] = {0};
+ u32 *...
2005 May 29
1
doc-patch README.menu
patch is self explanatory, I trust.
im not sure about patch2, (I didnt do a controlled test).
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2020 Aug 25
0
[PATCH 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
...diff --git a/drivers/gpu/drm/nouveau/dispnv50/core507d.c
> > b/drivers/gpu/drm/nouveau/dispnv50/core507d.c
> > index e341f572c2696..5e86feec3b720 100644
> > --- a/drivers/gpu/drm/nouveau/dispnv50/core507d.c
> > +++ b/drivers/gpu/drm/nouveau/dispnv50/core507d.c
> > @@ -65,13 +65,26 @@ core507d_ntfy_init(struct nouveau_bo *bo, u32 offset)
> > int
> > core507d_caps_init(struct nouveau_drm *drm, struct nv50_disp *disp)
> > {
> > - u32 *push = evo_wait(&disp->core->chan, 2);
> > + struct nv50_core *core = disp->c...
2020 Aug 24
4
[PATCH 0/2] drm/nouveau: Backport SOR/PIOR probing fixes for v5.8
These didn't apply cleanly to v5.8, so here's a backported version.
Lyude Paul (2):
drm/nouveau/kms/nv50-: Program notifier offset before requesting disp
caps
drm/nouveau/kms/nv50-: Log SOR/PIOR caps
drivers/gpu/drm/nouveau/dispnv50/core507d.c | 25 ++++++++++++++++-----
drivers/gpu/drm/nouveau/dispnv50/disp.c | 10 +++++++++
2 files changed, 29 insertions(+), 6 deletions(-)
2015 Mar 16
0
[PATCH 8/9] qspinlock: Generic paravirt support
...b/kernel/locking/qspinlock.c
@@ -18,6 +18,9 @@
* Authors: Waiman Long <waiman.long at hp.com>
* Peter Zijlstra <peterz at infradead.org>
*/
+
+#ifndef _GEN_PV_LOCK_SLOWPATH
+
#include <linux/smp.h>
#include <linux/bug.h>
#include <linux/cpumask.h>
@@ -65,13 +68,21 @@
#include "mcs_spinlock.h"
+#ifdef CONFIG_PARAVIRT_SPINLOCKS
+#define MAX_NODES 8
+#else
+#define MAX_NODES 4
+#endif
+
/*
* Per-CPU queue node structures; we can never have more than 4 nested
* contexts: task, softirq, hardirq, nmi.
*
* Exactly fits one 64-byte...
2015 Mar 16
0
[PATCH 8/9] qspinlock: Generic paravirt support
...b/kernel/locking/qspinlock.c
@@ -18,6 +18,9 @@
* Authors: Waiman Long <waiman.long at hp.com>
* Peter Zijlstra <peterz at infradead.org>
*/
+
+#ifndef _GEN_PV_LOCK_SLOWPATH
+
#include <linux/smp.h>
#include <linux/bug.h>
#include <linux/cpumask.h>
@@ -65,13 +68,21 @@
#include "mcs_spinlock.h"
+#ifdef CONFIG_PARAVIRT_SPINLOCKS
+#define MAX_NODES 8
+#else
+#define MAX_NODES 4
+#endif
+
/*
* Per-CPU queue node structures; we can never have more than 4 nested
* contexts: task, softirq, hardirq, nmi.
*
* Exactly fits one 64-byte...
1999 Dec 24
5
ANNOUNCE: openssh-1.2.1pre20
...world order" - Alan Cox
| Damien Miller - http://www.mindrot.org/
| Email: djm at mindrot.org (home) -or- djm at ibs.com.au (work)
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Version: GnuPG v1.0.0 (GNU/Linux)
Comment: For info see http://www.gnupg.org
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k+92eziI5oqXySFkuhCNCqY=
=t4uu
-----END PGP SIGNATURE-----
1999 Dec 24
5
ANNOUNCE: openssh-1.2.1pre20
...world order" - Alan Cox
| Damien Miller - http://www.mindrot.org/
| Email: djm at mindrot.org (home) -or- djm at ibs.com.au (work)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.0.0 (GNU/Linux)
Comment: For info see http://www.gnupg.org
iD8DBQE4ZAIbormJ9RG1dI8RAmp2AJ962AAA5qwWCEqgwFGB/YbdM65o3ACgyW0g
k+92eziI5oqXySFkuhCNCqY=
=t4uu
-----END PGP SIGNATURE-----
2015 Apr 07
0
[PATCH v15 09/15] pvqspinlock: Implement simple paravirt support for the qspinlock
...b/kernel/locking/qspinlock.c
@@ -18,6 +18,9 @@
* Authors: Waiman Long <waiman.long at hp.com>
* Peter Zijlstra <peterz at infradead.org>
*/
+
+#ifndef _GEN_PV_LOCK_SLOWPATH
+
#include <linux/smp.h>
#include <linux/bug.h>
#include <linux/cpumask.h>
@@ -65,13 +68,21 @@
#include "mcs_spinlock.h"
+#ifdef CONFIG_PARAVIRT_SPINLOCKS
+#define MAX_NODES 8
+#else
+#define MAX_NODES 4
+#endif
+
/*
* Per-CPU queue node structures; we can never have more than 4 nested
* contexts: task, softirq, hardirq, nmi.
*
* Exactly fits one 64-byte...
2015 Apr 24
0
[PATCH v16 08/14] pvqspinlock: Implement simple paravirt support for the qspinlock
...b/kernel/locking/qspinlock.c
@@ -18,6 +18,9 @@
* Authors: Waiman Long <waiman.long at hp.com>
* Peter Zijlstra <peterz at infradead.org>
*/
+
+#ifndef _GEN_PV_LOCK_SLOWPATH
+
#include <linux/smp.h>
#include <linux/bug.h>
#include <linux/cpumask.h>
@@ -65,13 +68,21 @@
#include "mcs_spinlock.h"
+#ifdef CONFIG_PARAVIRT_SPINLOCKS
+#define MAX_NODES 8
+#else
+#define MAX_NODES 4
+#endif
+
/*
* Per-CPU queue node structures; we can never have more than 4 nested
* contexts: task, softirq, hardirq, nmi.
*
* Exactly fits one 64-byte...
2019 Nov 07
0
[PATCH v2 02/15] mm/mmu_notifier: add an interval tree notifier
...ways pairs with smp_store_release() to the same
> memory, there is only one store, is a comment really needed?
>
> Below are the comment updates I made, thanks!
>
> Jason
>
> diff --git a/include/linux/mmu_notifier.h b/include/linux/mmu_notifier.h
> index 51b92ba013ddce..065c95002e9602 100644
> --- a/include/linux/mmu_notifier.h
> +++ b/include/linux/mmu_notifier.h
> @@ -302,15 +302,15 @@ void mmu_range_notifier_remove(struct mmu_range_notifier *mrn);
> /**
> * mmu_range_set_seq - Save the invalidation sequence
> * @mrn - The mrn passed to inv...
2012 Jul 04
0
[PATCH] Add xwayland support (v2)
...WAYLAND
+nouveau_drv_la_SOURCES += xwayland_compat.c
+endif
+
EXTRA_DIST = hwdefs/nv_3ddefs.xml.h \
hwdefs/nv_m2mf.xml.h \
hwdefs/nv_object.xml.h \
diff --git a/src/nouveau_dri2.c b/src/nouveau_dri2.c
index 0b3cc38..c7f769d 100644
--- a/src/nouveau_dri2.c
+++ b/src/nouveau_dri2.c
@@ -653,6 +653,21 @@ nouveau_dri2_flip_event_handler(unsigned int frame, unsigned int tv_sec,
free(flip);
}
+#ifdef XORG_WAYLAND
+static int nouveau_auth_magic(ScreenPtr pScreen, uint32_t magic)
+{
+ ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen);
+ NVPtr pNv = NVPTR(pScrn);
+
+ /* Not wayland, go str...
2019 Jun 27
1
[libnbd PATCH] maint: Use $(NULL) for all Makefile.am macro lists
...kefile.am | 6 ++--
include/Makefile.am | 3 +-
interop/Makefile.am | 24 +++++++++-----
lib/Makefile.am | 21 ++++++++----
ocaml/Makefile.am | 15 ++++++---
ocaml/examples/Makefile.am | 3 +-
sh/Makefile.am | 3 +-
tests/Makefile.am | 65 ++++++++++++++++++++++++--------------
12 files changed, 139 insertions(+), 70 deletions(-)
diff --git a/Makefile.am b/Makefile.am
index d758378..6a0f4bd 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -22,7 +22,8 @@ ACLOCAL_AMFLAGS = -I m4
EXTRA_DIST = \
.dir-locals.el \
.gitignore \
- html/p...
2015 May 04
1
[PATCH v16 08/14] pvqspinlock: Implement simple paravirt support for the qspinlock
...b/kernel/locking/qspinlock.c
@@ -18,6 +18,9 @@
* Authors: Waiman Long <waiman.long at hp.com>
* Peter Zijlstra <peterz at infradead.org>
*/
+
+#ifndef _GEN_PV_LOCK_SLOWPATH
+
#include <linux/smp.h>
#include <linux/bug.h>
#include <linux/cpumask.h>
@@ -65,13 +68,21 @@
#include "mcs_spinlock.h"
+#ifdef CONFIG_PARAVIRT_SPINLOCKS
+#define MAX_NODES 8
+#else
+#define MAX_NODES 4
+#endif
+
/*
* Per-CPU queue node structures; we can never have more than 4 nested
* contexts: task, softirq, hardirq, nmi.
*
* Exactly fits one 64-byte...
2015 May 04
1
[PATCH v16 08/14] pvqspinlock: Implement simple paravirt support for the qspinlock
...b/kernel/locking/qspinlock.c
@@ -18,6 +18,9 @@
* Authors: Waiman Long <waiman.long at hp.com>
* Peter Zijlstra <peterz at infradead.org>
*/
+
+#ifndef _GEN_PV_LOCK_SLOWPATH
+
#include <linux/smp.h>
#include <linux/bug.h>
#include <linux/cpumask.h>
@@ -65,13 +68,21 @@
#include "mcs_spinlock.h"
+#ifdef CONFIG_PARAVIRT_SPINLOCKS
+#define MAX_NODES 8
+#else
+#define MAX_NODES 4
+#endif
+
/*
* Per-CPU queue node structures; we can never have more than 4 nested
* contexts: task, softirq, hardirq, nmi.
*
* Exactly fits one 64-byte...
2008 Sep 01
1
[PATCH 1/4 v2] PCI: introduce new base functions
...esno)
+void pci_update_resource(struct pci_dev *dev, int resno)
{
struct pci_bus_region region;
u32 new, check, mask;
int reg;
+ enum pci_bar_type type;
+ struct resource *res = dev->resource + resno;
/*
* Ignore resources for unimplemented BARs and unused resource slots
@@ -63,17 +65,13 @@ void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno)
else
mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
- if (resno < 6) {
- reg = PCI_BASE_ADDRESS_0 + 4 * resno;
- } else if (resno == PCI_ROM_RESOURCE) {
+ reg = pci_resource_bar(dev, resno, &type);
+ if (!re...
2008 Sep 01
1
[PATCH 1/4 v2] PCI: introduce new base functions
...esno)
+void pci_update_resource(struct pci_dev *dev, int resno)
{
struct pci_bus_region region;
u32 new, check, mask;
int reg;
+ enum pci_bar_type type;
+ struct resource *res = dev->resource + resno;
/*
* Ignore resources for unimplemented BARs and unused resource slots
@@ -63,17 +65,13 @@ void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno)
else
mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
- if (resno < 6) {
- reg = PCI_BASE_ADDRESS_0 + 4 * resno;
- } else if (resno == PCI_ROM_RESOURCE) {
+ reg = pci_resource_bar(dev, resno, &type);
+ if (!re...
2008 Sep 01
1
[PATCH 1/4 v2] PCI: introduce new base functions
...esno)
+void pci_update_resource(struct pci_dev *dev, int resno)
{
struct pci_bus_region region;
u32 new, check, mask;
int reg;
+ enum pci_bar_type type;
+ struct resource *res = dev->resource + resno;
/*
* Ignore resources for unimplemented BARs and unused resource slots
@@ -63,17 +65,13 @@ void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno)
else
mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
- if (resno < 6) {
- reg = PCI_BASE_ADDRESS_0 + 4 * resno;
- } else if (resno == PCI_ROM_RESOURCE) {
+ reg = pci_resource_bar(dev, resno, &type);
+ if (!re...