Displaying 8 results from an estimated 8 matches for "64x8".
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2009 Mar 11
2
[NV50] application to confirm texture layout
...the texture layout.
No message means it's ok. Otherwise it spews a lot of errors.
You have to manually set the TILE_HEIGHT, TILE_WIDTH and TILING_PARAM.
TILE_WIDTH == TILE_PITCH in this case because it's 8bpp data.
Use this list (TILING_PARAM) TILE_WIDTHxTILE_HEIGHT:
(0x00) 32x4
(0x10) 64x8
(0x20) 64x16
(0x30) 64x32
(0x40) 64x64
I'm curious to know if anyone has different layouts.
You may need to sudo run it.
Maarten.
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2019 Oct 15
2
[PATCH] drm: Generalized NV Block Linear DRM format mod
...> + (((k) & 0xff) << 12) | \
> + (((g) & 0x3) << 20) | \
> + (((s) & 0x1) << 22) | \
> + (((c) & 0x3) << 23)))
> +
> +/*
> + * 16Bx2 Block Linear layout, used by Tegra K1 and later
> *
> * Pixels are arranged in 64x8 Groups Of Bytes (GOBs). GOBs are then stacked
> * vertically by a power of 2 (1 to 32 GOBs) to form a block.
> @@ -518,20 +610,20 @@ extern "C" {
> * in full detail.
> */
> #define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(v) \
> - fourcc_mod_code(NVIDIA, 0x10 | ((v) &...
2019 Oct 14
2
[PATCH] drm: Generalized NV Block Linear DRM format mod
Beyond general review, I'm looking for feedback on a few things
specifically here:
-Is the level of backwards compatibility described here sufficient?
Technically I can make the user space drivers support the old
modifiers too, but that would mean the layout they specify would
morph based on the GPU they're being used on, and sharing buffers
between two different NV GPUs, which would
2019 Oct 15
1
[PATCH] drm: Generalized NV Block Linear DRM format mod
...(((s) & 0x1) << 22) | \
> >> + (((c) & 0x3) << 23)))
> >> +
> >> +/*
> >> + * 16Bx2 Block Linear layout, used by Tegra K1 and later
> >> *
> >> * Pixels are arranged in 64x8 Groups Of Bytes (GOBs). GOBs are then stacked
> >> * vertically by a power of 2 (1 to 32 GOBs) to form a block.
> >> @@ -518,20 +610,20 @@ extern "C" {
> >> * in full detail.
> >> */
> >> #define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(v)...
2019 Oct 14
0
[PATCH] drm: Generalized NV Block Linear DRM format mod
...e(NVIDIA, (0x10 | \
+ ((h) & 0xf) | \
+ (((k) & 0xff) << 12) | \
+ (((g) & 0x3) << 20) | \
+ (((s) & 0x1) << 22) | \
+ (((c) & 0x3) << 23)))
+
+/*
+ * 16Bx2 Block Linear layout, used by Tegra K1 and later
*
* Pixels are arranged in 64x8 Groups Of Bytes (GOBs). GOBs are then stacked
* vertically by a power of 2 (1 to 32 GOBs) to form a block.
@@ -518,20 +610,20 @@ extern "C" {
* in full detail.
*/
#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(v) \
- fourcc_mod_code(NVIDIA, 0x10 | ((v) & 0xf))
+ DRM_FORMAT_MOD_NVIDI...
2019 Oct 16
0
[PATCH v2] drm: Generalized NV Block Linear DRM format mod
...64
+drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
+{
+ if (!(modifier & 0x10) || (modifier & (0xff << 12)))
+ return modifier;
+ else
+ return modifier | (0xfe << 12);
+}
+
+/*
+ * 16Bx2 Block Linear layout, used by Tegra K1 and later
*
* Pixels are arranged in 64x8 Groups Of Bytes (GOBs). GOBs are then stacked
* vertically by a power of 2 (1 to 32 GOBs) to form a block.
@@ -518,20 +618,20 @@ extern "C" {
* in full detail.
*/
#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(v) \
- fourcc_mod_code(NVIDIA, 0x10 | ((v) & 0xf))
+ DRM_FORMAT_MOD_NVIDI...
2019 Dec 11
0
[PATCH v3] drm: Generalized NV Block Linear DRM format mod
...64
+drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
+{
+ if (!(modifier & 0x10) || (modifier & (0xff << 12)))
+ return modifier;
+ else
+ return modifier | (0xfe << 12);
+}
+
+/*
+ * 16Bx2 Block Linear layout, used by Tegra K1 and later
*
* Pixels are arranged in 64x8 Groups Of Bytes (GOBs). GOBs are then stacked
* vertically by a power of 2 (1 to 32 GOBs) to form a block.
@@ -518,20 +624,20 @@ extern "C" {
* in full detail.
*/
#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(v) \
- fourcc_mod_code(NVIDIA, 0x10 | ((v) & 0xf))
+ DRM_FORMAT_MOD_NVIDI...
2019 Oct 15
0
[PATCH] drm: Generalized NV Block Linear DRM format mod
...< 12) | \
>> + (((g) & 0x3) << 20) | \
>> + (((s) & 0x1) << 22) | \
>> + (((c) & 0x3) << 23)))
>> +
>> +/*
>> + * 16Bx2 Block Linear layout, used by Tegra K1 and later
>> *
>> * Pixels are arranged in 64x8 Groups Of Bytes (GOBs). GOBs are then stacked
>> * vertically by a power of 2 (1 to 32 GOBs) to form a block.
>> @@ -518,20 +610,20 @@ extern "C" {
>> * in full detail.
>> */
>> #define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(v) \
>> - fourcc_mod_c...