search for: 64s

Displaying 20 results from an estimated 33 matches for "64s".

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2020 Jul 02
0
[PATCH 5/8] powerpc/64s: implement queued spinlocks and rwlocks
Excerpts from Will Deacon's message of July 2, 2020 6:02 pm: > On Thu, Jul 02, 2020 at 05:48:36PM +1000, Nicholas Piggin wrote: >> diff --git a/arch/powerpc/include/asm/qspinlock.h b/arch/powerpc/include/asm/qspinlock.h >> new file mode 100644 >> index 000000000000..f84da77b6bb7 >> --- /dev/null >> +++ b/arch/powerpc/include/asm/qspinlock.h >> @@ -0,0
2020 Jul 02
0
[PATCH 5/8] powerpc/64s: implement queued spinlocks and rwlocks
Excerpts from Will Deacon's message of July 2, 2020 8:35 pm: > On Thu, Jul 02, 2020 at 08:25:43PM +1000, Nicholas Piggin wrote: >> Excerpts from Will Deacon's message of July 2, 2020 6:02 pm: >> > On Thu, Jul 02, 2020 at 05:48:36PM +1000, Nicholas Piggin wrote: >> >> diff --git a/arch/powerpc/include/asm/qspinlock.h b/arch/powerpc/include/asm/qspinlock.h
2020 Jul 02
2
[PATCH 5/8] powerpc/64s: implement queued spinlocks and rwlocks
On Thu, Jul 02, 2020 at 05:48:36PM +1000, Nicholas Piggin wrote: > diff --git a/arch/powerpc/include/asm/qspinlock.h b/arch/powerpc/include/asm/qspinlock.h > new file mode 100644 > index 000000000000..f84da77b6bb7 > --- /dev/null > +++ b/arch/powerpc/include/asm/qspinlock.h > @@ -0,0 +1,20 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef _ASM_POWERPC_QSPINLOCK_H >
2020 Jul 02
2
[PATCH 5/8] powerpc/64s: implement queued spinlocks and rwlocks
On Thu, Jul 02, 2020 at 05:48:36PM +1000, Nicholas Piggin wrote: > diff --git a/arch/powerpc/include/asm/qspinlock.h b/arch/powerpc/include/asm/qspinlock.h > new file mode 100644 > index 000000000000..f84da77b6bb7 > --- /dev/null > +++ b/arch/powerpc/include/asm/qspinlock.h > @@ -0,0 +1,20 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef _ASM_POWERPC_QSPINLOCK_H >
2020 Jul 09
1
[PATCH v3 4/6] powerpc/64s: implement queued spinlocks and rwlocks
Nicholas Piggin <npiggin at gmail.com> writes: > These have shown significantly improved performance and fairness when > spinlock contention is moderate to high on very large systems. > > [ Numbers hopefully forthcoming after more testing, but initial > results look good ] Would be good to have something here, even if it's preliminary. > Thanks to the fast path,
2020 Jul 02
0
[PATCH 5/8] powerpc/64s: implement queued spinlocks and rwlocks
These have shown significantly improved performance and fairness when spinlock contention is moderate to high on very large systems. [ Numbers hopefully forthcoming after more testing, but initial results look good ] Thanks to the fast path, single threaded performance is not noticably hurt. Signed-off-by: Nicholas Piggin <npiggin at gmail.com> --- arch/powerpc/Kconfig
2020 Jul 06
0
[PATCH v3 4/6] powerpc/64s: implement queued spinlocks and rwlocks
These have shown significantly improved performance and fairness when spinlock contention is moderate to high on very large systems. [ Numbers hopefully forthcoming after more testing, but initial results look good ] Thanks to the fast path, single threaded performance is not noticably hurt. Signed-off-by: Nicholas Piggin <npiggin at gmail.com> --- arch/powerpc/Kconfig
2020 Jul 02
3
[PATCH 5/8] powerpc/64s: implement queued spinlocks and rwlocks
On Thu, Jul 02, 2020 at 08:25:43PM +1000, Nicholas Piggin wrote: > Excerpts from Will Deacon's message of July 2, 2020 6:02 pm: > > On Thu, Jul 02, 2020 at 05:48:36PM +1000, Nicholas Piggin wrote: > >> diff --git a/arch/powerpc/include/asm/qspinlock.h b/arch/powerpc/include/asm/qspinlock.h > >> new file mode 100644 > >> index 000000000000..f84da77b6bb7 >
2020 Jul 02
3
[PATCH 5/8] powerpc/64s: implement queued spinlocks and rwlocks
On Thu, Jul 02, 2020 at 08:25:43PM +1000, Nicholas Piggin wrote: > Excerpts from Will Deacon's message of July 2, 2020 6:02 pm: > > On Thu, Jul 02, 2020 at 05:48:36PM +1000, Nicholas Piggin wrote: > >> diff --git a/arch/powerpc/include/asm/qspinlock.h b/arch/powerpc/include/asm/qspinlock.h > >> new file mode 100644 > >> index 000000000000..f84da77b6bb7 >
2010 Oct 22
1
Howto align partitions in Linux + NetApp
Hi, NetApp support has suggested us aligning partitions to improve performance, in short: starting sector must be divisible by 8. How can I move the start point in a misaligned partition -in production, with ext3- under Linux? A screenshot with a misaligned (start=63s) and aligned (start=64s) partition is available at: http://filesocial.com/lkwvvn2 (If anyone is interested in this topic, NetApp has a good document explaining performance issues in misaligned partitions: "Best Practices for File System Alignment in Virtual Environments", http://goo.gl/EkBw) I have tried...
2013 Feb 12
11
What can I do to make btrfs work?
...that anyone can run. *NB* before you run this, adjust /dev/sda & /dev/sda1 to point to an unused block device! ---------------------------------------------------------------------- #!/bin/sh - set -e while true; do parted -s -- /dev/sda mklabel msdos parted -s -- /dev/sda mkpart primary 64s -64s wipefs -a /dev/sda1 mkfs.btrfs --label TEST /dev/sda1 mount /dev/sda1 /sysroot touch /sysroot/foo mkdir /sysroot/bar umount /sysroot done ---------------------------------------------------------------------- On the latest 3.8.0 kernel, this fails immediately (at the mount), and o...
2005 Sep 22
0
io provider and files in a forceddirectio mounted filesystem
...@countem[args[1]->dev_pathname, args[2]->fi_pathname, self->action ] = count(); @elapsed[args[1]->dev_pathname, args[2]->fi_pathname, self->action ] = sum(timestamp - block[args[2]->fi_pathname, args[0]->b_blkno]); } dtrace:::END { printa("count: %64s %40s %1s %@14d\n", @countem); normalize(@elapsed, 1000); printa("elapsed: %64s %40s %1s %@14d\n", @elapsed); } #------------------------------------------------------------------ The Oracle dbase its files all reside in filesystems. The redo is on a directio mounted...
2013 Jul 11
0
[Announce] CTDB 2.3 available for download
...unable. To enable debug of locking issues set CTDB_DEBUG_LOCKS=/etc/ctdb/debug_locks.sh * In overall statistics and database statistics, lock buckets have been updated to use following timings: < 1ms, < 10ms, < 100ms, < 1s, < 2s, < 4s, < 8s, < 16s, < 32s, < 64s, >= 64s * Initscript is now simplified with most CTDB-specific functionality split out to ctdbd_wrapper, which is used to start and stop ctdbd. * Add systemd support. * CTDB subprocesses are now given informative names to allow them to be easily distinguished when using programs like &quo...
2005 Dec 28
4
Opteron, Athlon/64, and disaster recovery
Has anybody here taken a HDD configured with an Opteron system, and then put it into an Athlon/64 and had it work? Are they interchangeable, like an Athlon/32 and a P3/P4? -Ben -- "The best way to predict the future is to invent it." - XEROX PARC slogan, circa 1978
2006 Jun 22
2
[patch] ipconfig add dhcp file preseeding support
..., /* Vendor class "d-i" */ 255, }; diff --git a/usr/kinit/ipconfig/main.c b/usr/kinit/ipconfig/main.c index c9d3b0e..a54329f 100644 --- a/usr/kinit/ipconfig/main.c +++ b/usr/kinit/ipconfig/main.c @@ -71,6 +71,7 @@ static void print_device_config(struct n printf(" nisdomain: %-64s\n", dev->nisdomainname); printf(" rootserver: %s ", my_inet_ntoa(dev->ip_server)); printf("rootpath: %s\n", dev->bootpath); + printf(" filename : %s\n", dev->filename); } static void configure_device(struct netdev *dev) @@ -112,6 +113,7 @@ sta...
2006 Mar 09
5
Optimal platform for R
I'm looking to buy a new desktop which will primarily be used for analyses of large datasets (100s of MB). I've seen postings from several years back re the 'optimal' platform for running R, but nothing more recently. Specifically, I want to know: 1) if I run R under Windows, does having a dual-processor machine help speed things up? And 2) is it still true that R performs
2012 Oct 03
1
[PATCH] pxedump.c32: Simple PXE cached packet dumping
...+ mk_ipaddr(&sip, pkt->sip), + mk_ipaddr(&gip, pkt->gip), + printf( + "opcode: %u Hardware: %u Hardlen: %u Gatehops: %u ident: %08x\n" + "seconds: %u Flags: %u cip: %s yip: %s\n" + "sip: %s gip: %s\n" + "Sname: %.64s\n" + "bootfile: %.128s\n", + pkt->opcode, + pkt->Hardware, + pkt->Hardlen, + pkt->Gatehops, + pkt->ident, + pkt->seconds, + pkt->Flags, + cip.v, + yip.v, + sip.v, + gip.v, +...
2020 Jul 06
0
[PATCH v3 0/6] powerpc: queued spinlocks and rwlocks
...an (thank you). > > Thanks, > Nick > > Nicholas Piggin (6): > powerpc/powernv: must include hvcall.h to get PAPR defines > powerpc/pseries: move some PAPR paravirt functions to their own file > powerpc: move spinlock implementation to simple_spinlock > powerpc/64s: implement queued spinlocks and rwlocks > powerpc/pseries: implement paravirt qspinlocks for SPLPAR > powerpc/qspinlock: optimised atomic_try_cmpxchg_lock that adds the > lock hint > > arch/powerpc/Kconfig | 13 + > arch/powerpc/include/asm/...
2005 Oct 03
0
Re: [which kernel for AMD Sempron processor?
...2 Semprons are 32-bit only >They are Throughbred/Barton core (last rev Athlon XP) > >2. Most Socket-754 Semprons are 32-bit only >They are typically Newcastle core (mid-rev Athlon 64) with >the 52-bit addressing (PAE52) and other protions disabled > >3. New Socket-754 Sempron 64s are PAE52, 64-bit reg, etc... >Largely as an answer to Intel releasing the P4-Celeron EM64T, >AMD has stopped disabling the functionality of the cores. A >few are even newer Winchester (Rev. D), although I haven't >seen a Venice (Rev. E -- SSE support) Sempron 64 > >Now regar...
2001 Mar 13
0
[PATCH] openssh 2.5.1p2 TIS authserv support
...ne[length - 1] == '\n') + line[length - 1] = 0; + if (strncmp(line, "challenge", 9) != 0) + return NULL; + return strdup(line + 10); +} + +int tis_response(struct tis_context *ctx, char *response) +{ + char line[128]; + int length; + + snprintf(line, 120, "response \"%.64s\"\n", response) ; + if (send(ctx->connfd, line, strlen(line), 0) < 0) + return 0; + if ((length = recv(ctx->connfd, line, sizeof(line) - 1, 0)) < 0) + return 0; + line[length] = 0; + if (strncmp(line, "ok", 2) == 0) { + return 1; + } + return 0; +} + +char *tis_fa...