Displaying 5 results from an estimated 5 matches for "640b".
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640
2012 Oct 25
2
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...600_Reg32:%vreg30
560BJUMP <BB#3>, pred:%PREDICATE_BIT
576BJUMP <BB#2>, pred:%noreg
BB#2:# derived from
608B%vreg39<def> = COPY %vreg6:sel_x; R600_Reg32:%vreg39 R600_Reg128:%vreg6
register: %vreg39 +[608r,624r:0)
624B%T2_X<def> = COPY %vreg39<kill>; R600_Reg32:%vreg39
640B%vreg40<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg40 R600_Reg128:%vreg6
register: %vreg40 +[640r,656r:0)
656B%T2_Y<def> = COPY %vreg40<kill>; R600_Reg32:%vreg40
672B%vreg41<def> = COPY %vreg6:sel_z; R600_Reg32:%vreg41 R600_Reg128:%vreg6
register: %vreg41 +[672r,688r:0)
688B%T...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...gt;, pred:%PREDICATE_BIT
> 576BJUMP <BB#2>, pred:%noreg
> BB#2:# derived from
> 608B%vreg39<def> = COPY %vreg6:sel_x; R600_Reg32:%vreg39
> R600_Reg128:%vreg6
> register: %vreg39 +[608r,624r:0)
> 624B%T2_X<def> = COPY %vreg39<kill>; R600_Reg32:%vreg39
> 640B%vreg40<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg40
> R600_Reg128:%vreg6
> register: %vreg40 +[640r,656r:0)
> 656B%T2_Y<def> = COPY %vreg40<kill>; R600_Reg32:%vreg40
> 672B%vreg41<def> = COPY %vreg6:sel_z; R600_Reg32:%vreg41
> R600_Reg128:%vreg6
> registe...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...t;def> = COPY %vreg11<kill>; R600_Reg32:%vreg49,%vreg11
> 1152BJUMP <BB#1>, pred:%noreg
>
> // EXPORTED VALUES
> 608B%vreg39<def> = COPY %vreg6:sel_x; R600_Reg32:%vreg39 R600_Reg128:%vreg6
> 624B%T2_X<def> = COPY %vreg39<kill>; R600_Reg32:%vreg39
> 640B%vreg40<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg40 R600_Reg128:%vreg6
> 656B%T2_Y<def> = COPY %vreg40<kill>; R600_Reg32:%vreg40
> 672B%vreg41<def> = COPY %vreg6:sel_z; R600_Reg32:%vreg41 R600_Reg128:%vreg6
> 688B%T2_Z<def> = COPY %vreg41<kill>; R600_Reg...
2012 Sep 18
2
[LLVMdev] liveness assertion problem in llc
...reg16<kill>, 0, pred:%noreg; PredRegs:%vreg17 IntRegs:%vreg16 dbg:../src/getbits.c:53:3
560B %vreg26<def> = ADDri %vreg26<kill>, 1, pred:%noreg; IntRegs:%vreg26 dbg:../src/getbits.c:56:5
624B JUMP <BB#4>, pred:%vreg17<kill>; PredRegs:%vreg17 dbg:../src/getbits.c:53:3
640B JUMP <BB#5>, pred:%noreg; dbg:../src/getbits.c:53:3
Successors according to CFG: BB#4(124) BB#5(4)
656B BB#5: derived from LLVM BB %if.end
Predecessors according to CFG: BB#4 BB#1 BB#6
688B %P15<def> = COPY %vreg27<kill>; IntRegs:%vreg27 dbg:../src/getbits.c:60:1
704B...
2012 Oct 24
3
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...vreg48,%vreg10
1136B%vreg49<def> = COPY %vreg11<kill>; R600_Reg32:%vreg49,%vreg11
1152BJUMP <BB#1>, pred:%noreg
// EXPORTED VALUES
608B%vreg39<def> = COPY %vreg6:sel_x; R600_Reg32:%vreg39 R600_Reg128:%vreg6
624B%T2_X<def> = COPY %vreg39<kill>; R600_Reg32:%vreg39
640B%vreg40<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg40 R600_Reg128:%vreg6
656B%T2_Y<def> = COPY %vreg40<kill>; R600_Reg32:%vreg40
672B%vreg41<def> = COPY %vreg6:sel_z; R600_Reg32:%vreg41 R600_Reg128:%vreg6
688B%T2_Z<def> = COPY %vreg41<kill>; R600_Reg32:%vreg41
704B...