Displaying 4 results from an estimated 4 matches for "632r".
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2011 Dec 08
2
[LLVMdev] Register allocation in two passes
...This is the debug
output I'm getting to show what I mean:
Inline spilling DLDREGS:%vreg25,1.436782e-03 = [344r,640r:0) 0 at 344r
>From original %vreg8,1.838235e-03 = [224r,640r:0) 0 at 224r
Value %vreg25:0 at 344r may remat from %vreg25<def> = LDIWRdK 2;
DLDREGS:%vreg25
remat: 632r %vreg28<def> = LDIWRdK 2; DLDREGS:%vreg28
640e %R15R14<def> = COPY %vreg28<kill>; DLDREGS:%vreg28
interval: %vreg28,inf = [632r,640r:0) 0 at 632r
All defs dead: %vreg25<def,dead> = LDIWRdK 2; DLDREGS:%vreg25
Remat created 1 dead defs.
Deleting dead def...
2011 Nov 30
0
[LLVMdev] Register allocation in two passes
On Nov 30, 2011, at 12:17 PM, Borja Ferrer wrote:
> Thanks for all the hints Jakob, I've added the following piece of code after the spill code handling inside selectOrSplit() (ignoring some control logic):
>
> for (LiveIntervals::const_iterator I = LIS->begin(), E = LIS->end(); I != E;
> ++I)
> {
> unsigned VirtReg = I->first;
> if
2011 Dec 08
0
[LLVMdev] Register allocation in two passes
...tput I'm getting to show what I mean:
>
> Inline spilling DLDREGS:%vreg25,1.436782e-03 = [344r,640r:0) 0 at 344r
> From original %vreg8,1.838235e-03 = [224r,640r:0) 0 at 224r
> Value %vreg25:0 at 344r may remat from %vreg25<def> = LDIWRdK 2; DLDREGS:%vreg25
> remat: 632r %vreg28<def> = LDIWRdK 2; DLDREGS:%vreg28
> 640e %R15R14<def> = COPY %vreg28<kill>; DLDREGS:%vreg28
> interval: %vreg28,inf = [632r,640r:0) 0 at 632r
> All defs dead: %vreg25<def,dead> = LDIWRdK 2; DLDREGS:%vreg25
> Remat created 1 dead def...
2011 Nov 30
2
[LLVMdev] Register allocation in two passes
Thanks for all the hints Jakob, I've added the following piece of code
after the spill code handling inside selectOrSplit() (ignoring some control
logic):
for (LiveIntervals::const_iterator I = LIS->begin(), E = LIS->end(); I !=
E;
++I)
{
unsigned VirtReg = I->first;
if ((TargetRegisterInfo::isVirtualRegister(VirtReg))
&& (VRM->getPhys(VirtReg)