Displaying 2 results from an estimated 2 matches for "5fdce15a".
2013 Nov 12
2
[LLVMdev] Limit loop vectorizer to SSE
On 12 November 2013 15:14, Frank Winter <fwinter at jlab.org> wrote:
> I am asking because the option 'force-vector-width' is too restrictive.
> I would like to leave open the possibility to use vector width 2.
I was about to say that, and you saved us both one cycle. ;)
What you could do is to force an architecture that doesn't have AVX, only
SSE. I'm not sure how
2013 Nov 12
0
[LLVMdev] Limit loop vectorizer to SSE
...; the Target attributes would be enough. Nor I know what CPU string
> limits support to SSE, but that should do it.
>
> cheers,
> --renato
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20131112/5fdce15a/attachment.html>