Displaying 1 result from an estimated 1 matches for "5db5edaa".
2014 Jan 11
3
[LLVMdev] Possible error in docs.
http://llvm.org/docs/CodeGenerator.html#machine-code-description-classes
Section starting:
Fixed (preassigned) registers
It talks about converting:
define i32 @test(i32 %X, i32 %Y) {
%Z = udiv i32 %X, %Y
ret i32 %Z
}
into
;; X is in EAX, Y is in ECX
mov %EAX, %EDX
sar %EDX, 31
idiv %ECX
ret
BUT, where does the "sar" come from?
Kind Regards
James