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On Oct 21, 2013, at 12:09 PM, Dmitry Babokin <babokin at gmail.com> wrote: > By the way, I'm curious, is the any reason why you focus on SSE4, not AVX? Seems that vectorizer should care the most about the latest silicon. > I am interested in looking at the SSE4 code because lowering of AVX code is more complicated, especially for masks. The problem that <8 x i1> can be

Nadav, You are right, ISPC may issue intrinsics as a result of AST selection. Though I believe that we should stick to LLVM IR whenever is possible. Intrinsics may appear to be boundaries for optimizations (on both data and control flow) and are generally not optimizable. LLVM may improve over time from performance stand point and we would benefit from it (or it may play against us, like in this

...itation by explicitly extending the mask. The SEXT > canonicalization reverted the code pattern that ISPC generated. > > Thanks, > Nadav > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20131026/59618dad/attachment.html> -------------- next part -------------- A non-text attachment was scrubbed... Name: v4.ll Type: application/octet-stream Size: 464 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20131026/59618dad/attachment.obj> -------------- next par...