Displaying 2 results from an estimated 2 matches for "593300f".
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59300
2016 Mar 28
0
RFC: atomic operations on SI+
...ing.h
> @@ -313,6 +313,7 @@ enum NodeType : unsigned {
> STORE_MSKOR,
> LOAD_CONSTANT,
> TBUFFER_STORE_FORMAT,
> + CMP_SWAP,
> LAST_AMDGPU_ISD_NUMBER
> };
>
> diff --git a/lib/Target/AMDGPU/CIInstructions.td b/lib/Target/AMDGPU/CIInstructions.td
> index 593300f..d99b013 100644
> --- a/lib/Target/AMDGPU/CIInstructions.td
> +++ b/lib/Target/AMDGPU/CIInstructions.td
> @@ -156,7 +156,7 @@ defm FLAT_ATOMIC_SWAP : FLAT_ATOMIC <
> flat<0x30, 0x40>, "flat_atomic_swap", VGPR_32
> >;
> defm FLAT_ATOMIC_CMPSWAP : FLAT_ATO...
2016 Mar 25
2
RFC: atomic operations on SI+
Hi Tom, Matt,
I'm working on a project that needs few coherent atomic operations (HSA
mode: load, store, compare-and-swap) for std::atomic_uint in HCC.
the attached patch implements atomic compare and swap for SI+
(untested). I tried to stay within what was available, but there are
few issues that I was unsure how to address:
1.) it currently uses v2i32 for both input and output. This