search for: 58522

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2017 Jun 01
1
RPC Server is unavailable
...OK - wbinfo -i (show users correctly), - wbinfo -g (show groups corrsctly), - users have access to files on share, - files/directories have right privileges getfacl example_dir # file: example_dir # owner: xxx # group: xxy user::rwx user:root:rwx user:50000:rwx user:50002:rwx user:51151:rwx user:58522:rwx group::--- group:50000:rwx group:50002:rwx group:50068:rwx group:58522:rwx mask::rwx other::--- default:user::rwx default:user:root:rwx default:user:50000:rwx default:user:50002:rwx default:user:51151:rwx default:user:58522:rwx default:group::--- default:group:50000:rwx default:group:50002:rwx...
2017 Jun 05
1
RPC Server is unavailable
...n share, >> - files/directories have right privileges >> >> getfacl example_dir >> # file: example_dir >> # owner: xxx >> # group: xxy >> user::rwx >> user:root:rwx >> user:50000:rwx >> user:50002:rwx >> user:51151:rwx >> user:58522:rwx >> group::--- >> group:50000:rwx >> group:50002:rwx >> group:50068:rwx >> group:58522:rwx >> mask::rwx >> other::--- >> default:user::rwx >> default:user:root:rwx >> default:user:50000:rwx >> default:user:50002:rwx >> defau...
2013 Sep 27
1
snow::makeCluster on Windows hangs
...ron I6400 with T2300 Dual Core processor The OS: > version _ platform i386-pc-mingw32 arch i386 os mingw32 system i386, mingw32 status major 2 minor 14.2 year 2012 month 02 day 29 svn rev 58522 language R version.string R version 2.14.2 (2012-02-29)
2012 Oct 17
3
Install rgdal, lazy loading error
...ux-gnu" $arch [1] "x86_64" $os [1] "linux-gnu" $system [1] "x86_64, linux-gnu" $status [1] "" $major [1] "2" $minor [1] "14.2" $year [1] "2012" $month [1] "02" $day [1] "29" $`svn rev` [1] "58522" $language [1] "R" $version.string [1] "R version 2.14.2 (2012-02-29)" Any thoughts are appreciated, Best, ben please forgive cross-posting on R-sig geo for those who subscribe to both. Ben Weinstein Graduate Student Ecology and Evolution Stony Brook University http...
2010 Feb 05
0
[LLVMdev] Integrated instruction scheduling/register allocation
...and clean. Thanks for the feedback, Jakob and Evan. Gergo -- Gergö Barany, research assistant gergo at complang.tuwien.ac.at Institute of Computer Languages http://www.complang.tuwien.ac.at/gergo/ Vienna University of Technology Tel: +43-1-58801-58522 Argentinierstrasse 8/E185, 1040 Wien, Austria Fax: +43-1-58801-18598
2011 Feb 14
0
SIS generating 2 different hashes for the same mail and attachment
...e47b1f-98d08416e4712b4d75310100bde47b1f-192 -rw------- 1 vmail vmail 242866 Feb 12 23:50 0478b28c2a4c235370bb3cef4bc0482bb6000dae-b8819638a60e574d5b530100bde47b1f-2088e7301f9e3c4dc97e0000bde47b1f-244 So these files are not hardlinks, they are 2 seperate files. Checksums are the same: # sum * 58522 238 0478b28c2a4c235370bb3cef4bc0482bb6000dae-007dcd01a70e574d5c530100bde47b1f-98d08416e4712b4d75310100bde47b1f-192 58522 238 0478b28c2a4c235370bb3cef4bc0482bb6000dae-b8819638a60e574d5b530100bde47b1f-2088e7301f9e3c4dc97e0000bde47b1f-244 # md5 * MD5 (0478b28c2a4c235370bb3cef4bc0482bb6000dae-007...
2010 Feb 06
1
[LLVMdev] Integrated instruction scheduling/register allocation
...k, Jakob and Evan. > > > Gergo > -- > Gergö Barany, research assistant gergo at complang.tuwien.ac.at > Institute of Computer Languages http://www.complang.tuwien.ac.at/gergo/ > Vienna University of Technology Tel: +43-1-58801-58522 > Argentinierstrasse 8/E185, 1040 Wien, Austria Fax: +43-1-58801-18598
2012 Jun 18
0
[LLVMdev] Is cross-compiling for ARM on x86 with llvm/Clang possible?
...39;t documented anywhere. This might have changed in the meantime. -- Gergö Barany, research assistant gergo at complang.tuwien.ac.at Institute of Computer Languages http://www.complang.tuwien.ac.at/gergo/ Vienna University of Technology Tel: +43-1-58801-58522 Argentinierstrasse 8/E185, 1040 Wien, Austria Fax: +43-1-58801-18598
2012 Mar 06
1
Windows - **Paste commands only** issue
...386-pc-mingw32" $arch [1] "i386" $os [1] "mingw32" $system [1] "i386, mingw32" $status [1] "" $major [1] "2" $minor [1] "14.2" $year [1] "2012" $month [1] "02" $day [1] "29" $`svn rev` [1] "58522" $language [1] "R" $version.string [1] "R version 2.14.2 (2012-02-29)" ------------------------------------------ Robert W. Baer, Ph.D. Professor of Physiology Kirksville College of Osteopathic Medicine A. T. Still University of Health Sciences 800 W. Jefferson St. Kirk...
2010 Feb 04
2
[LLVMdev] Integrated instruction scheduling/register allocation
A more pressing need is a pre-regalloc scheduler that can switch modes to balance reducing latency vs. reducing register pressure. The problem is the current approach is the scheduler is locked into one mode or the other. For x86, it generally makes sense to schedule for low register pressure. That is, until you are dealing with a block that are explicitly SSE code in 64-bit mode. In that case,
2010 Aug 29
0
[LLVMdev] [Query] Programming Register Allocation
...tion selector creates all necessary conversion instructions. -- Gergö Barany, research assistant gergo at complang.tuwien.ac.at Institute of Computer Languages http://www.complang.tuwien.ac.at/gergo/ Vienna University of Technology Tel: +43-1-58801-58522 Argentinierstrasse 8/E185, 1040 Wien, Austria Fax: +43-1-58801-18598
2010 Aug 28
2
[LLVMdev] [Query] Programming Register Allocation
So I have a good understanding of what and how I want to do in the abstract sense. I am starting to gain a feel for the code base, and I see that I may have a allocator up and running much faster than I once thought thanks to the easy interfaces. What I need to know is how to access the machine register classes. Also, I need to know which virtual register is to be mapped into each specific
2010 Aug 29
1
[LLVMdev] [Query] Programming Register Allocation
...creates all necessary conversion instructions. > > -- > Gergö Barany, research assistant > gergo at complang.tuwien.ac.at > Institute of Computer Languages > http://www.complang.tuwien.ac.at/gergo/ > Vienna University of Technology Tel: > +43-1-58801-58522 > Argentinierstrasse 8/E185, 1040 Wien, Austria Fax: > +43-1-58801-18598 > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100829/24246c54/attachment.html>
2012 Jun 16
4
[LLVMdev] Is cross-compiling for ARM on x86 with llvm/Clang possible?
Hello list, I wonder if llvm/Clang can compile C or C++ for ARM from on x86. http://comments.gmane.org/gmane.comp.compilers.clang.devel/8896 The talk above answered 'NO' to my question, which means Clang is not yet able to cross compile for ARM on X86. Is the answer still correct for my question? I saw somewhere that Clang supports ARM on Darwin only. Then is the cross compiling
2010 Nov 26
2
[LLVMdev] ARM Intruction Constraint DestReg!=SrcReg patch?
Hi, Paul Curtis wrote: > If you read the Arm Architecture document for ARMv5, it states for MUL: > > "Operand restriction: Specifying the same register for <Rd> and <Rm> was > previously described as producing UNPREDICTABLE results. There is no > restriction in ARMv6, and it is believed all relevant ARMv4 and ARMv5 > implementations do not require this
2012 May 04
3
[LLVMdev] how compile subproject
Hello, is it possible to compile just an subproject? For example, just llc or lli? Cheers. Beckert. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120503/c20aa7b1/attachment.html>
2012 Jun 21
1
[LLVMdev] LLVM stack
Hello Everyone, Would you please send me any links to documentation on LLVM stack? I am particularly interested in knowing how each instruction in an LLVM bit code file(.ll file) affects its stack. To be specific, is it possible to map an LLVM program as operations on a stack? Thanks, Amruth
2012 Aug 02
1
[LLVMdev] Question about arm thumb2 code generation
Thanks andrew for the answer. I would like to generate code for Cortex-A9 that don't use neon for fp computation but vfpv3 -d16. I've tried some combination of -mattr=+neon,-neonfp,+vfp3,+d16 but couldn't get ".fpu vfpv3-d16" directive generated in assembly file. Do you know how to make it happen ? Best Regards Seb From: Andrew Trick [mailto:atrick at apple.com] Sent:
2012 Aug 08
1
[LLVMdev] Creating DAGs
All, I apologize if this is an inappropriate question for this mailing list. If so, please recommend an appropriate place to post the question. I'm also somewhat new to LLVM, so I could have some pretty fundamental misunderstandings about what I am trying to do. I have searched for information on the llvm.org website (user's guide, programmer's manual and doxygen documentation),
2012 Sep 11
0
[LLVMdev] Minimum Array Size
...non-null pointer to a valid array of the given number of elements. -- Gergö Barany, research assistant gergo at complang.tuwien.ac.at Institute of Computer Languages http://www.complang.tuwien.ac.at/gergo/ Vienna University of Technology Tel: +43-1-58801-58522 Argentinierstrasse 8/E185, 1040 Wien, Austria Fax: +43-1-58801-18598