search for: 58131

CentOS Errata and Security Advisory 2006:0393 https://rhn.redhat.com/errata/RHSA-2006-0393.html The following updated files have been uploaded and are currently syncing to the mirrors: i386: ntp-4.2.0.a.20040617-4.EL4.1.i386.rpm src: ntp-4.2.0.a.20040617-4.EL4.1.src.rpm -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type:

Here is the patch 0004-Enable-HLE-code-generation.patch Yours - Michael On Tue, 2013-02-19 at 14:07 -0800, Michael Liao wrote: > Hi All, > > I'd like to add HLE support in LLVM/clang consistent to GCC's style [1]. > HLE from Intel TSX [2] is legacy compatible instruction set extension to > specify transactional region by adding XACQUIRE and XRELEASE prefixes. > To

...ext/x-patch Size: 8779 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130219/80b09a00/attachment-0002.bin> -------------- next part -------------- A non-text attachment was scrubbed... Name: 0004-Enable-HLE-code-generation.patch Type: text/x-patch Size: 58131 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130219/80b09a00/attachment-0003.bin> -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-Add-target-flags-support-for-atomic-ops.patch Type: text/x-patch Size: 17724 byt...

Hi All, I'd like to add HLE support in LLVM/clang consistent to GCC's style [1]. HLE from Intel TSX [2] is legacy compatible instruction set extension to specify transactional region by adding XACQUIRE and XRELEASE prefixes. To support that, GCC chooses the approach by extending the memory order flag in __atomic_* builtins with target-specific memory model in high bits (bit 31-16 for