search for: 561314

Hello, My linux server (kernel 2.0.36 + samba 2.0.4) has successfully joined my Nt domain (with smbpasswd -j <NTDOM> -r <NTPDC>), and the 2 daemons start ok, but I cannot browse the computer in the Network Neighbourhood, i get : \\SAMBASRV n'est pas accessible Erreur réseau inattendue. which means \\SAMBASRV is not accessible. Unexpected network error. Is something

...toring > into 3 smaller patches and function renames, as per feedback from > Greg Kroah-Hartman. > b) Use VRINGH infrastructure for accessing virtio rings from the host > in patch 5, as per feedback from Michael S. Tsirkin. > > v1: Initial post @ https://lwn.net/Articles/561314/ > Hi Greg, It has been a couple of weeks since we posted v3 @ https://lwn.net/Articles/564795 which addresses all feedback received so far. Have you had a chance to review this version? Please let us know your thoughts. Thanks in advance, Sudeep Dutt > Description: > ============ &gt...

...I documentation, patch 1 refactoring into 3 smaller patches and function renames, as per feedback from Greg Kroah-Hartman. b) Use VRINGH infrastructure for accessing virtio rings from the host in patch 5, as per feedback from Michael S. Tsirkin. v1: Initial post @ https://lwn.net/Articles/561314/ Description: ============ An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configura...

...I documentation, patch 1 refactoring into 3 smaller patches and function renames, as per feedback from Greg Kroah-Hartman. b) Use VRINGH infrastructure for accessing virtio rings from the host in patch 5, as per feedback from Michael S. Tsirkin. v1: Initial post @ https://lwn.net/Articles/561314/ Description: ============ An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configura...

...I documentation, patch 1 refactoring into 3 smaller patches and function renames, as per feedback from Greg Kroah-Hartman. b) Use VRINGH infrastructure for accessing virtio rings from the host in patch 5, as per feedback from Michael S. Tsirkin. v1: Initial post @ https://lwn.net/Articles/561314/ Description: ============ An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configura...

...I documentation, patch 1 refactoring into 3 smaller patches and function renames, as per feedback from Greg Kroah-Hartman. b) Use VRINGH infrastructure for accessing virtio rings from the host in patch 5, as per feedback from Michael S. Tsirkin. v1: Initial post @ https://lwn.net/Articles/561314/ Description: ============ An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configura...