Displaying 3 results from an estimated 3 matches for "553e635d".
2011 May 25
0
[LLVMdev] Floating Point Register Allocation in X86 backend
On May 25, 2011, at 11:09 AM, aparna kotha wrote:
> Hi Guys,
>
> I was working on some floating point intensive benchmarks and realize that the floating point register allocation in llvm assumes that there are only 7 floating point registers in X86, whereas the hardware has 8.
>
> Line number
> 00266 assert(Reg >= X86::FP0 && Reg <= X86::FP6 &&
2011 May 25
2
[LLVMdev] Floating Point Register Allocation in X86 backend
...39;t have SSE support.
>
> Use SSE if you care about floating point performance. I think -mcpu=... is
> all you need.
>
> /jakob
>
>
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2011 May 25
2
[LLVMdev] Floating Point Register Allocation in X86 backend
Hi Guys,
I was working on some floating point intensive benchmarks and realize that
the floating point register allocation in llvm assumes that there are only 7
floating point registers in X86, whereas the hardware has 8.
Line number
00266 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!");
of X86FloatingPoint.cpp.
Is there any reason for