Displaying 4 results from an estimated 4 matches for "52391".
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2391
2008 Jun 16
0
[LLVMdev] PowerPC instruction cache invalidation
On Mon, 16 Jun 2008, Gary Benson wrote:
> When you genetate code on PowerPC you need to explicitly invalidate
> the instruction cache to force the processor to reread it. In LLVM
> there is code to do this for function stubs on Macintosh, but not
> for other platforms and not for JITted code generally.
Applied, thanks!
2008 Jun 17
1
[LLVMdev] PowerPC instruction cache invalidation
...nvalidation too but if it does it
could use the same hooks.
Cheers,
Gary
--
http://gbenson.net/
-------------- next part --------------
Index: include/llvm/Target/TargetJITInfo.h
===================================================================
--- include/llvm/Target/TargetJITInfo.h (revision 52391)
+++ include/llvm/Target/TargetJITInfo.h (working copy)
@@ -94,6 +94,11 @@
assert(NumRelocs == 0 && "This target does not have relocations!");
}
+ /// InvalidateInstructionCache - Before the JIT can run a block of code
+ // that has been emitted it must invalid...
2008 Jun 16
6
[LLVMdev] PowerPC instruction cache invalidation
Hi all,
When you genetate code on PowerPC you need to explicitly invalidate
the instruction cache to force the processor to reread it. In LLVM
there is code to do this for function stubs on Macintosh, but not
for other platforms and not for JITted code generally.
The attached patch adds support for GNU platforms, but I can't figure
out a nice way to call it for all generated code. Can
2007 May 28
12
Anyone using storeconfigs with a DB other than sqlite?
Just wondering if anyone is using a backend database other than sqlite,
and if so, how easy/hard it was to configure.
I''m constantly receiving "SQLite3::BusyException: database is locked..."
which I presume is due to sqlite''s relatively coarse locking method.
Cheers,
James
--
Senior Linux Platform Engineer
Midrange Services
AXA Technology Services - Asia Pacific