Displaying 3 results from an estimated 3 matches for "4fffffffh".
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4fffffff
2014 Sep 18
5
Standardizing an MSR or other hypercall to get an RNG seed?
On Thu, Sep 18, 2014 at 11:58 AM, Paolo Bonzini <pbonzini at redhat.com> wrote:
>
>> > Actually, that MSR address range has been reserved for that purpose, along
>> > with:
>> > - CPUID.EAX=1 -> ECX bit 31 (always returns 0 on bare metal)
>> > - CPUID.EAX=4000_00xxH leaves (i.e. HYPERVISOR CPUID)
>>
>> I don't know whether this is
2014 Sep 18
5
Standardizing an MSR or other hypercall to get an RNG seed?
On Thu, Sep 18, 2014 at 11:58 AM, Paolo Bonzini <pbonzini at redhat.com> wrote:
>
>> > Actually, that MSR address range has been reserved for that purpose, along
>> > with:
>> > - CPUID.EAX=1 -> ECX bit 31 (always returns 0 on bare metal)
>> > - CPUID.EAX=4000_00xxH leaves (i.e. HYPERVISOR CPUID)
>>
>> I don't know whether this is
2014 Sep 18
0
Standardizing an MSR or other hypercall to get an RNG seed?
...And would Microsoft be okay with using this mechanism for
> discovery?
So, for CPUID, the SDM (Table 3-17. Information Returned by CPUID) says today:
"No existing or future CPU will return processor identification or
feature information if the initial EAX value is in the range 40000000H
to 4FFFFFFFH."
We can define a cross-VM CPUID range from there. The CPUID can return
the index of the MSR if needed.
--
Jun
Intel Open Source Technology Center