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...liant with this version of the CommonHV > specification. This doesn't match the name of "miscellaneous features". Furthermore, 0 is a valid (albeit unlikely) MSR index. How about having a proper bitmask, where bit 0 in one of the registers means "the RNG information at leaf 4F000003 is valid"? > > ### CommonHV RNG > > If CPUID.4F000002H.EAX is nonzero, then it contains an MSR index used to > communicate with a hypervisor random number generator. This MSR is > referred to as MSR_COMMONHV_RNG. > > rdmsr(MSR_COMMONHV_RNG) returns a 64-bit best-effor...

...liant with this version of the CommonHV > specification. This doesn't match the name of "miscellaneous features". Furthermore, 0 is a valid (albeit unlikely) MSR index. How about having a proper bitmask, where bit 0 in one of the registers means "the RNG information at leaf 4F000003 is valid"? > > ### CommonHV RNG > > If CPUID.4F000002H.EAX is nonzero, then it contains an MSR index used to > communicate with a hypervisor random number generator. This MSR is > referred to as MSR_COMMONHV_RNG. > > rdmsr(MSR_COMMONHV_RNG) returns a 64-bit best-effor...

Here's a draft CommonHV spec. It's also on github: https://github.com/amluto/CommonHV So far, this provides a two-way RNG interface, a way to detect it, and a way to detect other hypervisor leaves. The latter is because, after both the enormous public thread and some private discussions, it seems that detection of existing CPUID paravirt leaves is annoying and inefficient. If

Here's a draft CommonHV spec. It's also on github: https://github.com/amluto/CommonHV So far, this provides a two-way RNG interface, a way to detect it, and a way to detect other hypervisor leaves. The latter is because, after both the enormous public thread and some private discussions, it seems that detection of existing CPUID paravirt leaves is annoying and inefficient. If