Displaying 3 results from an estimated 3 matches for "4c7fa718".
2013 Jun 13
0
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
So fence only forces ordering of atomic instructions.
Let me change my question then.
If I have a target-specific intrinsic which forces ordering of ordinary load/store instructions. Then should it also force ordering of load/stores to noalias pointers in caller functions?
Thanks,
Xiaoyi
From: Eli Friedman [mailto:eli.friedman at gmail.com]
Sent: Wednesday, June 12, 2013 7:06 PM
To: Guo,
2013 Jun 13
2
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
...ike
this; it assumes noalias means "nothing inside this function will touch the
memory in question except accesses through this pointer".
-Eli
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2013 Jun 13
2
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
On Wed, Jun 12, 2013 at 6:17 PM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com> wrote:
> Hi,
>
> I have the following test case:
>
> define void @foo(<2 x float>* noalias nocapture %out, <2 x float>*
> noalias nocapture %data0) nounwind {
> entry:
> %val1 = load <2 x float>* %data0, align 8
> store <2 x float> %val1, <2 x float>* %out,