Displaying 2 results from an estimated 2 matches for "4c3c2ba7".
2013 Jun 19
0
[LLVMdev] Vector type LOAD/STORE with post-increment.
...e by other backends to lower such IR, and make
sure your backend uses the post-indexed load for the cases you care about.
Makes sense?
cheers,
--renato
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2013 Jun 19
3
[LLVMdev] Vector type LOAD/STORE with post-increment.
I am trying to implement vector type load/store with post-increment for an
out of tree backend.
I see that that ARM NEON support such load/store so I am using ARM NEON as
an example of what to do.
The problem is I can't get any C or C++ code example to actually generate
vector load/store with post increment.
I am talking about something like this:
vldr d16, [sp, #8]
Does anybody