search for: 4byte

Displaying 17 results from an estimated 17 matches for "4byte".

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2013 Sep 24
1
[LLVMdev] possible dwarf regression
In compiling perlbench in SPEC2006 today, I get the following asm code: .4byte ($debug_loc2280) .4byte 1 .4byte PerlIO_fd_refcnt $set1406 = ($.bss_end)-PerlIO_fd_refcnt .4byte ($set1406) .4byte PerlIO_perlio $set1407 = ($.data_end)-PerlIO_perlio .4byte ($set1407) .4byte ($func_begin0) $set1408 = ($.text_end)-($func_begin0)...
2016 Apr 22
2
RFC: EfficiencySanitizer Cache Fragmentation tool
...tool to be well under the 5x EfficiencySanitizer ceiling; presumably it should be under 2x. =========================== Heap/global object access patterns =========================== We plan to use shadow memory and sampling to keep track of heap/global object accesses. Shadow memory: We use a 4byte-to-1byte shadow mapping. Each application word is mapped to a - shadow byte, and so a 64-byte cache line is mapped to a 16-byte shadow memory. In each shadow byte, the highest bit is used for indicating whether the corresponding application word is accessed, and the other 7 bits are...
2016 Apr 23
2
RFC: EfficiencySanitizer Cache Fragmentation tool
...> =========================== > > > Heap/global object access patterns > > > =========================== > > > We plan to use shadow memory and sampling to keep track of > > heap/global object accesses. > > > Shadow memory: > > > We use a 4byte-to-1byte shadow mapping. Each application word is > > mapped to a > > > * > > > shadow byte, and so a 64-byte cache line is mapped to a 16-byte > > shadow memory. In each shadow byte, the highest bit is used for > > indicating whether the corresponding applica...
2016 Apr 23
2
RFC: EfficiencySanitizer Cache Fragmentation tool
...g; presumably it should be under 2x. > > =========================== > > Heap/global object access patterns > > =========================== > > We plan to use shadow memory and sampling to keep track of heap/global > object accesses. > > Shadow memory: > We use a 4byte-to-1byte shadow mapping. Each application word is mapped > to a > > - > > shadow byte, and so a 64-byte cache line is mapped to a 16-byte shadow > memory. In each shadow byte, the highest bit is used for indicating whether > the corresponding application word is ac...
2012 Feb 24
1
[LLVMdev] DW_AT_inline not present in assembly for an inlined inline function
...aware that Clang uses C99 mode by default. In case of GCC, .uleb128 0x2 @ (DIE (0x25) DW_TAG_subprogram) .byte 0x1 @ DW_AT_external .ascii "t\0" @ DW_AT_name .byte 0x1 @ DW_AT_decl_file (test.h) .byte 0x1 @ DW_AT_decl_line .4byte 0x30 @ DW_AT_type .byte 0x3 @ DW_AT_inline In case of Clang, .byte 4 @ Abbrev [4] 0x87:0xa DW_TAG_subprogram .byte 116 @ DW_AT_name .byte 0 .byte 2 @ DW_AT_decl_file .byte 2...
2014 Aug 07
3
[LLVMdev] MCJIT generates MOVAPS on unaligned address
...oreInst>(VL0); > unsigned Alignment = SI->getAlignment(); > ... > StoreInst *S = Builder.CreateStore(VecValue, VecPtr); > if (!Alignment) > Alignment = DL->getABITypeAlignment(SI->getPointerOperand()->getType()); // << Get the 4byte alignment for the scalar float store from the data layout string. > S->setAlignment(Alignment); -------------- next part -------------- A non-text attachment was scrubbed... Name: module_H7ktW0.ll.gz Type: application/x-gzip Size: 65781 bytes Desc: not available URL: <http://lists...
2017 Oct 18
2
Possible bug of Alias Analysis?
...t/float pointers, which is illegal in C (6.5/7) > and in OpenCL (6.1.8). Try using -fno-strict-aliasing to avoid > emitting tbaa metadata. Thanks for the explanation. I think I get your point. In fact the plain cast was introduced during expanding intrinsic llvm.memcpy(). As on our platform, 4byte copy is more efficient. So if we can, we will try to cast arguments to llvm.memcpy to 'pointer of int' type no matter what the type of the pointers passed in. if we have to disable TBAA to solve the issue, then looks like we have to completely disable TBAA through the whole compilation of a...
2016 Dec 28
0
why clang compile local to global
> On Dec 27, 2016, at 11:09 PM, liuyu11 at ict.ac.cn via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hello,everyone: > I want to known how to let clang compile my local array to local variables: > I have the code : > int main() > { > int a[3]={1,2,3}; > > int b=7; > int c=8; > int d=9; > int e=10; > int f=11; >
2014 Aug 07
2
[LLVMdev] MCJIT generates MOVAPS on unaligned address
...unsigned Alignment = SI->getAlignment(); >>> ... >>> StoreInst *S = Builder.CreateStore(VecValue, VecPtr); >>> if (!Alignment) >>> Alignment = DL->getABITypeAlignment(SI->getPointerOperand()->getType()); // << Get the 4byte alignment for the scalar float store from the data layout string. >>> S->setAlignment(Alignment); >> >> >> <module_H7ktW0.ll.gz> > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu...
2001 Jul 24
4
Debugging ssh-keygen dsa on Solaris8
Hello, >From the response to my original post regarding openssh, obviously the only way to resolve the problem of getting openssh to work properly under Solaris 8 with openssl 0.9.6b was to compile with debugging an analyze to core file. Let me state that I am not a developer, but maybe the following will help. I have compiled both openssh2.96p2 and openssl 0.9.6b with debugging using the Sun
2014 Aug 07
3
[LLVMdev] MCJIT generates MOVAPS on unaligned address
MCJIT when lowering to x86-64 generates a MOVAPS (Move Aligned Packed Single-Precision Floating-Point Values) on a non-aligned memory address: movaps 88(%rdx), %xmm0 where %rdx comes in as a function argument with only natural alignment (float*). This x86 instruction requires the memory address to be 16 byte aligned which 88 plus something aligned to 4 byte isn't. Here the
2004 Feb 12
3
hardware question
I recently asked this question, but I didn't get an answer on this part of my question: What hardware would be able to do this with ease: I must install a samba server as PDC for my school. The server would authenticate users using openldap (on the same server). And if possible, I would also run an intranet on it (apache, php, mysql). There would be about a hundred (maybe 150 later on)
2017 Oct 17
3
Possible bug of Alias Analysis?
Hi, I am an out-of-tree user of llvm. I am running into an regression issue against llvm 5.0. The issue was introduced by "[BasicAA] Use MayAlias instead of PartialAlias for fallback."( https://reviews.llvm.org/D34318) I have attached a very simple program to reproduce the issue. The symptom is alias analysis report NoAlias to GVN which cause GVN do wrong optimization. The BasicAA
2017 Oct 18
2
Possible bug of Alias Analysis?
...> and in OpenCL (6.1.8). Try using -fno-strict-aliasing to avoid > >> emitting tbaa metadata. > > > > Thanks for the explanation. I think I get your point. > > In fact the plain cast was introduced during expanding intrinsic llvm.memcpy(). > > As on our platform, 4byte copy is more efficient. So if we can, we will try to > cast arguments to llvm.memcpy to 'pointer of int' type no matter what the type > of the pointers passed in. > > if we have to disable TBAA to solve the issue, then looks like we have to > completely disable TBAA through t...
2011 Oct 04
1
Added DHCPINFO Tables to the lua.c32 Implementation - syslinux-4.04
...se 45: + case 47: + case 48: + case 49: + case 50: + case 51: + case 54: + case 65: + case 68: + case 69: + case 70: + case 71: + case 72: + case 73: + case 74: + case 75: + case 76: + ip_address_list(L, value, len, option); + break; +// 4byte options - numerical + case 2: + case 24: + case 35: + case 38: + case 58: + case 59: + case 211: + sprintf(op_name, "%u", option); + lua_pushstring(L, op_name); + lua_pushinteger(L, ntohl(*(long*)value)); + lua_settable(...
2009 Nov 04
1
[PATCH] nv10/exa: Spring-cleaning
...2-pass : setup the source texture as A8 twice, - with different tex coords, do B and G on first pass - Then setup again and do R and A on second pass - */ - int part_pos_dX = 0; - int part_pos_sX = 0; - int mask_out_bytes = 0; - - part_pos_dX = (dstX & ~3) >> 2; /*we start at the 4byte boundary to the left of the image */ - part_pos_sX = sX0 + (dstX & ~3) - dstX; - - /*xf86DrvMsg(0, X_INFO, "drawing - srcX %f dstX %d w %d\n", sX0, dstX, width);*/ - for (; part_pos_dX <= (((dstX + width) & ~3) >> 2); part_pos_sX += 4, part_pos_dX++) { - mask_out_byt...
2003 Feb 23
6
Copying EAs and ACLs
Hello, I am the guy behind the ext2/ext3 patches for Extended Attributes and ACLs, and I've recently been asked about ACL support in rsync by Eric. Upon investigating I found that you have an ACL patch against rsync-2.5.5 [1]. I also found some other postings to rsync@lists.samba.org concerning rsync and ACLs [3]. Are there any plans for finalizing an integrating that rsync ACL patch? I